From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from galahad.ideasonboard.com ([185.26.127.97]:34982 "EHLO galahad.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752816AbeDFNgE (ORCPT ); Fri, 6 Apr 2018 09:36:04 -0400 From: Laurent Pinchart To: Jacopo Mondi Cc: horms@verge.net.au, magnus.damm@gmail.com, geert@linux-m68k.org, niklas.soderlund@ragnatech.se, sergei.shtylyov@cogentembedded.com, dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Vladimir Barinov , Niklas =?ISO-8859-1?Q?S=F6derlund?= Subject: Re: [PATCH 3/7] arm64: dts: renesas: r8a77970: add DU support Date: Fri, 06 Apr 2018 16:36:02 +0300 Message-ID: <1845227.lvyihNjCgv@avalon> In-Reply-To: <1523020092-25540-4-git-send-email-jacopo+renesas@jmondi.org> References: <1523020092-25540-1-git-send-email-jacopo+renesas@jmondi.org> <1523020092-25540-4-git-send-email-jacopo+renesas@jmondi.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="iso-8859-1" Sender: linux-renesas-soc-owner@vger.kernel.org List-ID: Hi Jacopo, Thank you for the patch. On Friday, 6 April 2018 16:08:08 EEST Jacopo Mondi wrote: > From: Sergei Shtylyov >=20 > Define the generic R8A77970 part of the DU device node. >=20 > Based on the original (and large) patch by Daisuke Matsushita > . >=20 > Signed-off-by: Vladimir Barinov > Signed-off-by: Sergei Shtylyov > Signed-off-by: Niklas S=F6derlund Reviewed-by: Laurent Pinchart > --- > arch/arm64/boot/dts/renesas/r8a77970.dtsi | 28 +++++++++++++++++++++++++= +++ > 1 file changed, 28 insertions(+) >=20 > diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi > b/arch/arm64/boot/dts/renesas/r8a77970.dtsi index db06c94..e649e86 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi > @@ -635,6 +635,34 @@ > resets =3D <&cpg 623>; > renesas,fcp =3D <&fcpvd0>; > }; > + > + du: display@feb00000 { > + compatible =3D "renesas,du-r8a77970"; > + reg =3D <0 0xfeb00000 0 0x80000>; > + interrupts =3D ; > + clocks =3D <&cpg CPG_MOD 724>; > + clock-names =3D "du.0"; > + power-domains =3D <&sysc R8A77970_PD_ALWAYS_ON>; > + vsps =3D <&vspd0>; > + status =3D "disabled"; > + > + ports { > + #address-cells =3D <1>; > + #size-cells =3D <0>; > + > + port@0 { > + reg =3D <0>; > + du_out_rgb: endpoint { > + }; > + }; > + > + port@1 { > + reg =3D <1>; > + du_out_lvds: endpoint { > + }; > + }; > + }; > + }; > }; >=20 > timer { =2D-=20 Regards, Laurent Pinchart From mboxrd@z Thu Jan 1 00:00:00 1970 From: Laurent Pinchart Subject: Re: [PATCH 3/7] arm64: dts: renesas: r8a77970: add DU support Date: Fri, 06 Apr 2018 16:36:02 +0300 Message-ID: <1845227.lvyihNjCgv@avalon> References: <1523020092-25540-1-git-send-email-jacopo+renesas@jmondi.org> <1523020092-25540-4-git-send-email-jacopo+renesas@jmondi.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1523020092-25540-4-git-send-email-jacopo+renesas@jmondi.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Jacopo Mondi Cc: devicetree@vger.kernel.org, Niklas =?ISO-8859-1?Q?S=F6derlund?= , sergei.shtylyov@cogentembedded.com, magnus.damm@gmail.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Vladimir Barinov , linux-renesas-soc@vger.kernel.org, horms@verge.net.au, geert@linux-m68k.org, niklas.soderlund@ragnatech.se List-Id: devicetree@vger.kernel.org SGkgSmFjb3BvLAoKVGhhbmsgeW91IGZvciB0aGUgcGF0Y2guCgpPbiBGcmlkYXksIDYgQXByaWwg MjAxOCAxNjowODowOCBFRVNUIEphY29wbyBNb25kaSB3cm90ZToKPiBGcm9tOiBTZXJnZWkgU2h0 eWx5b3YgPHNlcmdlaS5zaHR5bHlvdkBjb2dlbnRlbWJlZGRlZC5jb20+Cj4gCj4gRGVmaW5lIHRo ZSBnZW5lcmljIFI4QTc3OTcwIHBhcnQgb2YgdGhlIERVIGRldmljZSBub2RlLgo+IAo+IEJhc2Vk IG9uIHRoZSBvcmlnaW5hbCAoYW5kIGxhcmdlKSBwYXRjaCBieSBEYWlzdWtlIE1hdHN1c2hpdGEK PiA8ZGFpc3VrZS5tYXRzdXNoaXRhLm5zQGhpdGFjaGkuY29tPi4KPiAKPiBTaWduZWQtb2ZmLWJ5 OiBWbGFkaW1pciBCYXJpbm92IDx2bGFkaW1pci5iYXJpbm92QGNvZ2VudGVtYmVkZGVkLmNvbT4K PiBTaWduZWQtb2ZmLWJ5OiBTZXJnZWkgU2h0eWx5b3YgPHNlcmdlaS5zaHR5bHlvdkBjb2dlbnRl bWJlZGRlZC5jb20+Cj4gU2lnbmVkLW9mZi1ieTogTmlrbGFzIFPDtmRlcmx1bmQgPG5pa2xhcy5z b2Rlcmx1bmQrcmVuZXNhc0ByYWduYXRlY2guc2U+CgpSZXZpZXdlZC1ieTogTGF1cmVudCBQaW5j aGFydCA8bGF1cmVudC5waW5jaGFydEBpZGVhc29uYm9hcmQuY29tPgoKPiAtLS0KPiAgYXJjaC9h cm02NC9ib290L2R0cy9yZW5lc2FzL3I4YTc3OTcwLmR0c2kgfCAyOCArKysrKysrKysrKysrKysr KysrKysrKysrKysrCj4gMSBmaWxlIGNoYW5nZWQsIDI4IGluc2VydGlvbnMoKykKPiAKPiBkaWZm IC0tZ2l0IGEvYXJjaC9hcm02NC9ib290L2R0cy9yZW5lc2FzL3I4YTc3OTcwLmR0c2kKPiBiL2Fy Y2gvYXJtNjQvYm9vdC9kdHMvcmVuZXNhcy9yOGE3Nzk3MC5kdHNpIGluZGV4IGRiMDZjOTQuLmU2 NDllODYgMTAwNjQ0Cj4gLS0tIGEvYXJjaC9hcm02NC9ib290L2R0cy9yZW5lc2FzL3I4YTc3OTcw LmR0c2kKPiArKysgYi9hcmNoL2FybTY0L2Jvb3QvZHRzL3JlbmVzYXMvcjhhNzc5NzAuZHRzaQo+ IEBAIC02MzUsNiArNjM1LDM0IEBACj4gIAkJCXJlc2V0cyA9IDwmY3BnIDYyMz47Cj4gIAkJCXJl bmVzYXMsZmNwID0gPCZmY3B2ZDA+Owo+ICAJCX07Cj4gKwo+ICsJCWR1OiBkaXNwbGF5QGZlYjAw MDAwIHsKPiArCQkJY29tcGF0aWJsZSA9ICJyZW5lc2FzLGR1LXI4YTc3OTcwIjsKPiArCQkJcmVn ID0gPDAgMHhmZWIwMDAwMCAwIDB4ODAwMDA+Owo+ICsJCQlpbnRlcnJ1cHRzID0gPEdJQ19TUEkg MjU2IElSUV9UWVBFX0xFVkVMX0hJR0g+Owo+ICsJCQljbG9ja3MgPSA8JmNwZyBDUEdfTU9EIDcy ND47Cj4gKwkJCWNsb2NrLW5hbWVzID0gImR1LjAiOwo+ICsJCQlwb3dlci1kb21haW5zID0gPCZz eXNjIFI4QTc3OTcwX1BEX0FMV0FZU19PTj47Cj4gKwkJCXZzcHMgPSA8JnZzcGQwPjsKPiArCQkJ c3RhdHVzID0gImRpc2FibGVkIjsKPiArCj4gKwkJCXBvcnRzIHsKPiArCQkJCSNhZGRyZXNzLWNl bGxzID0gPDE+Owo+ICsJCQkJI3NpemUtY2VsbHMgPSA8MD47Cj4gKwo+ICsJCQkJcG9ydEAwIHsK PiArCQkJCQlyZWcgPSA8MD47Cj4gKwkJCQkJZHVfb3V0X3JnYjogZW5kcG9pbnQgewo+ICsJCQkJ CX07Cj4gKwkJCQl9Owo+ICsKPiArCQkJCXBvcnRAMSB7Cj4gKwkJCQkJcmVnID0gPDE+Owo+ICsJ CQkJCWR1X291dF9sdmRzOiBlbmRwb2ludCB7Cj4gKwkJCQkJfTsKPiArCQkJCX07Cj4gKwkJCX07 Cj4gKwkJfTsKPiAgCX07Cj4gCj4gIAl0aW1lciB7CgotLSAKUmVnYXJkcywKCkxhdXJlbnQgUGlu Y2hhcnQKCgoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18K ZHJpLWRldmVsIG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0 dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg==