From: "Benoît Thébaudeau" <benoit.thebaudeau@advansee.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v3 1/6] arm: mvf600: Add Vybrid MVF600 CPU support
Date: Tue, 21 May 2013 21:00:47 +0200 (CEST) [thread overview]
Message-ID: <184612255.1023126.1369162847538.JavaMail.root@advansee.com> (raw)
In-Reply-To: <1369126981-13970-2-git-send-email-b18965@freescale.com>
Hi Alison,
On Tuesday, May 21, 2013 11:02:56 AM, Alison Wang wrote:
[...]
> diff --git a/arch/arm/include/asm/arch-mvf600/mvf_pins.h
> b/arch/arm/include/asm/arch-mvf600/mvf_pins.h
> new file mode 100644
> index 0000000..0fd89af
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-mvf600/mvf_pins.h
> @@ -0,0 +1,92 @@
> +/*
> + * Copyright 2013 Freescale Semiconductor, Inc.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __ASM_ARCH_MVF_PINS_H__
> +#define __ASM_ARCH_MVF_PINS_H__
> +
> +#include <asm/imx-common/iomux-v3.h>
> +
> +enum {
> + MVF600_PAD_PTA6__RMII0_CLKIN = IOMUX_PAD(0x0000, 0x0000, 2, 0x0000, 0, 0),
> + MVF600_PAD_PTB4__UART1_TX = IOMUX_PAD(0x0068, 0x0068, 2, 0x0380, 0, 0),
> + MVF600_PAD_PTB5__UART1_RX = IOMUX_PAD(0x006C, 0x006C, 2, 0x037C, 0, 0),
> + MVF600_PAD_PTC1__RMII0_MDIO = IOMUX_PAD(0x00B8, 0x00B8, 1, 0x0000, 0, 0),
> + MVF600_PAD_PTC0__RMII0_MDC = IOMUX_PAD(0x00B4, 0x00B4, 1, 0x0000, 0, 0),
> + MVF600_PAD_PTC2__RMII0_CRS_DV = IOMUX_PAD(0x00BC, 0x00BC, 1, 0x0000, 0,
> 0),
> + MVF600_PAD_PTC3__RMII0_RD1 = IOMUX_PAD(0x00C0, 0x00C0, 1, 0x0000, 0, 0),
> + MVF600_PAD_PTC4__RMII0_RD0 = IOMUX_PAD(0x00C4, 0x00C4, 1, 0x0000, 0, 0),
> + MVF600_PAD_PTC5__RMII0_RXER = IOMUX_PAD(0x00C8, 0x00C8, 1, 0x0000, 0, 0),
> + MVF600_PAD_PTC6__RMII0_TD1 = IOMUX_PAD(0x00CC, 0x00CC, 1, 0x0000, 0, 0),
> + MVF600_PAD_PTC7__RMII0_TD0 = IOMUX_PAD(0x00D0, 0x00D0, 1, 0x0000, 0, 0),
> + MVF600_PAD_PTC8__RMII0_TXEN = IOMUX_PAD(0x00D4, 0x00D4, 1, 0x0000, 0, 0),
> + MVF600_PAD_PTA24__ESDHC1_CLK = IOMUX_PAD(0x0038, 0x0038, 5, 0x0000, 0, 0),
> + MVF600_PAD_PTA25__ESDHC1_CMD = IOMUX_PAD(0x003C, 0x003C, 5, 0x0000, 0, 0),
> + MVF600_PAD_PTA26__ESDHC1_DAT0 = IOMUX_PAD(0x0040, 0x0040, 5, 0x0000, 0,
> 0),
> + MVF600_PAD_PTA27__ESDHC1_DAT1 = IOMUX_PAD(0x0044, 0x0044, 5, 0x0000, 0,
> 0),
> + MVF600_PAD_PTA28__ESDHC1_DAT2 = IOMUX_PAD(0x0048, 0x0048, 5, 0x0000, 0,
> 0),
> + MVF600_PAD_PTA29__ESDHC1_DAT3 = IOMUX_PAD(0x004C, 0x004C, 5, 0x0000, 0,
> 0),
> + MVF600_PAD_DDR_A15__DDR_A_15 = IOMUX_PAD(0x0220, 0x0220, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_A14__DDR_A_14 = IOMUX_PAD(0x0224, 0x0224, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_A13__DDR_A_13 = IOMUX_PAD(0x0228, 0x0228, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_A12__DDR_A_12 = IOMUX_PAD(0x022c, 0x022c, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_A11__DDR_A_11 = IOMUX_PAD(0x0230, 0x0230, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_A10__DDR_A_10 = IOMUX_PAD(0x0234, 0x0234, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_A9__DDR_A_9 = IOMUX_PAD(0x0238, 0x0238, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_A8__DDR_A_8 = IOMUX_PAD(0x023c, 0x023c, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_A7__DDR_A_7 = IOMUX_PAD(0x0240, 0x0240, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_A6__DDR_A_6 = IOMUX_PAD(0x0244, 0x0244, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_A5__DDR_A_5 = IOMUX_PAD(0x0248, 0x0248, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_A4__DDR_A_4 = IOMUX_PAD(0x024c, 0x024c, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_A3__DDR_A_3 = IOMUX_PAD(0x0250, 0x0250, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_A2__DDR_A_2 = IOMUX_PAD(0x0254, 0x0254, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_A1__DDR_A_1 = IOMUX_PAD(0x0258, 0x0258, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_BA2__DDR_BA_2 = IOMUX_PAD(0x0260, 0x0260, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_BA1__DDR_BA_1 = IOMUX_PAD(0x0264, 0x0264, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_BA0__DDR_BA_0 = IOMUX_PAD(0x0268, 0x0268, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_CAS__DDR_CAS_B = IOMUX_PAD(0x026c, 0x026c, 0, 0x0000, 0,
> 0),
> + MVF600_PAD_DDR_CKE__DDR_CKE_0 = IOMUX_PAD(0x0270, 0x0270, 0, 0x0000, 0,
> 0),
> + MVF600_PAD_DDR_CLK__DDR_CLK_0 = IOMUX_PAD(0x0274, 0x0274, 0, 0x0000, 0,
> 0),
> + MVF600_PAD_DDR_CS__DDR_CS_B_0 = IOMUX_PAD(0x0278, 0x0278, 0, 0x0000, 0,
> 0),
> + MVF600_PAD_DDR_D15__DDR_D_15 = IOMUX_PAD(0x027c, 0x027c, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_D14__DDR_D_14 = IOMUX_PAD(0x0280, 0x0280, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_D13__DDR_D_13 = IOMUX_PAD(0x0284, 0x0284, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_D12__DDR_D_12 = IOMUX_PAD(0x0288, 0x0288, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_D11__DDR_D_11 = IOMUX_PAD(0x028c, 0x028c, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_D10__DDR_D_10 = IOMUX_PAD(0x0290, 0x0290, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_D9__DDR_D_9 = IOMUX_PAD(0x0294, 0x0294, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_D8__DDR_D_8 = IOMUX_PAD(0x0298, 0x0298, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_D7__DDR_D_7 = IOMUX_PAD(0x029c, 0x029c, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_D6__DDR_D_6 = IOMUX_PAD(0x02a0, 0x02a0, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_D5__DDR_D_5 = IOMUX_PAD(0x02a4, 0x02a4, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_D4__DDR_D_4 = IOMUX_PAD(0x02a8, 0x02a8, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_D3__DDR_D_3 = IOMUX_PAD(0x02ac, 0x02ac, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_D2__DDR_D_2 = IOMUX_PAD(0x02b0, 0x02b0, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_D1__DDR_D_1 = IOMUX_PAD(0x02b4, 0x02b4, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_D0__DDR_D_0 = IOMUX_PAD(0x02b8, 0x02b8, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_DQM1__DDR_DQM_1 = IOMUX_PAD(0x02bc, 0x02bc, 0, 0x0000, 0,
> 0),
> + MVF600_PAD_DDR_DQM0__DDR_DQM_0 = IOMUX_PAD(0x02c0, 0x02c0, 0, 0x0000, 0,
> 0),
> + MVF600_PAD_DDR_DQS1__DDR_DQS_1 = IOMUX_PAD(0x02c4, 0x02c4, 0, 0x0000, 0,
> 0),
> + MVF600_PAD_DDR_DQS0__DDR_DQS_0 = IOMUX_PAD(0x02c8, 0x02c8, 0, 0x0000, 0,
> 0),
> + MVF600_PAD_DDR_RAS__DDR_RAS_B = IOMUX_PAD(0x02cc, 0x02cc, 0, 0x0000, 0,
> 0),
> + MVF600_PAD_DDR_WE__DDR_WE_B = IOMUX_PAD(0x02d0, 0x02d0, 0, 0x0000, 0, 0),
> + MVF600_PAD_DDR_ODT1__DDR_ODT_0 = IOMUX_PAD(0x02d4, 0x02d4, 0, 0x0000, 0,
> 0),
> + MVF600_PAD_DDR_ODT0__DDR_ODT_1 = IOMUX_PAD(0x02d8, 0x02d8, 0, 0x0000, 0,
> 0),
> +};
> +
> +#endif /* __ASM_ARCH_MVF_PINS_H__ */
These definitions won't work as expected without your "[PATCH v3 2/6] arm:
mvf600: Add IOMUX support for Vybrid MVF600", so 1/6 and 2/6 should probably be
swapped because of this dependency.
Best regards,
Beno?t
next prev parent reply other threads:[~2013-05-21 19:00 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-21 9:02 [U-Boot] [PATCH v3 0/6] arm: mvf600: Add Freescale Vybrid MVF600 CPU and MVF600TWR board support Alison Wang
2013-05-21 9:02 ` [U-Boot] [PATCH v3 1/6] arm: mvf600: Add Vybrid MVF600 CPU support Alison Wang
2013-05-21 13:48 ` Fabio Estevam
2013-05-22 2:59 ` Wang Huan-B18965
2013-05-21 16:57 ` Benoît Thébaudeau
2013-05-22 5:17 ` Wang Huan-B18965
2013-05-21 19:00 ` Benoît Thébaudeau [this message]
2013-05-22 5:30 ` Wang Huan-B18965
2013-05-21 9:02 ` [U-Boot] [PATCH v3 2/6] arm: mvf600: Add IOMUX support for Vybrid MVF600 Alison Wang
2013-05-21 17:10 ` Benoît Thébaudeau
2013-05-21 9:02 ` [U-Boot] [PATCH v3 3/6] net: fec_mxc: Add " Alison Wang
2013-05-21 17:15 ` Benoît Thébaudeau
2013-05-21 9:02 ` [U-Boot] [PATCH v3 4/6] arm: mvf600: Add watchdog " Alison Wang
2013-05-21 9:03 ` [U-Boot] [PATCH v3 5/6] arm: mvf600: Add uart " Alison Wang
2013-05-21 9:03 ` [U-Boot] [PATCH v3 6/6] arm: mvf600: Add basic support for Vybrid MVF600TWR board Alison Wang
2013-05-21 17:29 ` Benoît Thébaudeau
[not found] ` <81BA6E5E0BC2344391CABCEE22D1B6D8335B27@039-SN1MPN1-003.039d.mgd.msft.net>
2013-05-22 16:21 ` Benoît Thébaudeau
2013-05-23 5:44 ` Wang Huan-B18965
2013-05-21 19:19 ` Benoît Thébaudeau
2013-05-21 16:27 ` [U-Boot] [PATCH v3 0/6] arm: mvf600: Add Freescale Vybrid MVF600 CPU and MVF600TWR board support Benoît Thébaudeau
[not found] ` <81BA6E5E0BC2344391CABCEE22D1B6D8335A6C@039-SN1MPN1-003.039d.mgd.msft.net>
2013-05-23 17:09 ` Benoît Thébaudeau
2013-05-24 6:18 ` Wang Huan-B18965
2013-05-27 6:51 ` Stefano Babic
2013-05-28 8:51 ` Wang Huan-B18965
2013-05-28 9:03 ` Stefano Babic
2013-05-28 8:59 ` Wang Huan-B18965
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