From: Thomas Monjalon <thomas@monjalon.net>
To: Gregory Etelson <getelson@nvidia.com>
Cc: Pavan Nikhilesh Bhagavatula <pbhagavatula@marvell.com>,
"dev@dpdk.org" <dev@dpdk.org>,
"mkashani@nvidia.com" <mkashani@nvidia.com>,
"rasland@nvidia.com" <rasland@nvidia.com>,
Wathsala Vithanage <wathsala.vithanage@arm.com>,
Bruce Richardson <bruce.richardson@intel.com>,
Jerin Jacob <jerinj@marvell.com>
Subject: Re: [EXTERNAL] [PATCH] config/arm: fix meson for native instruction set Arm CPUs
Date: Wed, 19 Mar 2025 12:48:22 +0100 [thread overview]
Message-ID: <18752085.0ZKypZ73Fx@thomas> (raw)
In-Reply-To: <PH0PR18MB4086C3FC869C820807A4FA67DED92@PH0PR18MB4086.namprd18.prod.outlook.com>
19/03/2025 12:10, Pavan Nikhilesh Bhagavatula:
> > Hi Gregory,
> >
> > > Arm meson.build unconditionally relays on the `extra_features`
> > > member of SoC configuration.
> > >
> > > SoC dictionary is populated for Arm CPUs with generic instruction set
> > > only.
> > > For Arm CPUs with native CPU instruction set the SoC dictionary is
> > > empty.
> > >
> > > meson setup failed for the BlueField-3 because it belongs to
> > > the native Arm CPU instruction set.
> > >
> > > The patch adds global definition for extra_features.
> > >
> > > Fixes: 7829776d0abf ("config/arm: add extra -march features")
> > > Signed-off-by: Gregory Etelson <getelson@nvidia.com>
>
> Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Applied, thanks.
prev parent reply other threads:[~2025-03-19 11:48 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-19 10:25 [PATCH] config/arm: fix meson for native instruction set Arm CPUs Gregory Etelson
2025-03-19 11:02 ` [EXTERNAL] " Pavan Nikhilesh Bhagavatula
2025-03-19 11:10 ` Pavan Nikhilesh Bhagavatula
2025-03-19 11:48 ` Thomas Monjalon [this message]
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