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From: Jan Beulich <jbeulich@suse.com>
To: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Gianluca Guida <gianluca@rivosinc.com>,
	Bob Eshleman <bobbyeshleman@gmail.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	Connor Davis <connojdavis@gmail.com>,
	Bobby Eshleman <bobby.eshleman@gmail.com>,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v1 06/14] xen/riscv: introduce exception context
Date: Mon, 23 Jan 2023 12:13:30 +0100	[thread overview]
Message-ID: <189b2298-a84c-5fb2-7005-30c3f939096d@suse.com> (raw)
In-Reply-To: <00ecc26833738377003ad21603c198ae4278cfd3.1674226563.git.oleksii.kurochko@gmail.com>

On 20.01.2023 15:59, Oleksii Kurochko wrote:
> +/* On stack VCPU state */
> +struct cpu_user_regs
> +{
> +    register_t zero;
> +    register_t ra;
> +    register_t sp;
> +    register_t gp;
> +    register_t tp;
> +    register_t t0;
> +    register_t t1;
> +    register_t t2;
> +    register_t s0;
> +    register_t s1;
> +    register_t a0;
> +    register_t a1;
> +    register_t a2;
> +    register_t a3;
> +    register_t a4;
> +    register_t a5;
> +    register_t a6;
> +    register_t a7;
> +    register_t s2;
> +    register_t s3;
> +    register_t s4;
> +    register_t s5;
> +    register_t s6;
> +    register_t s7;
> +    register_t s8;
> +    register_t s9;
> +    register_t s10;
> +    register_t s11;
> +    register_t t3;
> +    register_t t4;
> +    register_t t5;
> +    register_t t6;
> +    register_t sepc;
> +    register_t sstatus;
> +    /* pointer to previous stack_cpu_regs */
> +    register_t pregs;
> +};

What is the planned correlation of this to what x86 a Arm have in their
public headers (under the same name)? I think the public header want
spelling out first, and if a different internal structure is intended to
be used, the interaction between the two would then want outlining in
the description here.

Jan


  parent reply	other threads:[~2023-01-23 11:13 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-20 14:59 [PATCH v1 00/14] RISCV basic exception handling implementation Oleksii Kurochko
2023-01-20 14:59 ` [PATCH v1 01/14] xen/riscv: add _zicsr to CFLAGS Oleksii Kurochko
2023-01-20 15:29   ` Andrew Cooper
2023-01-23 10:43     ` Oleksii
2023-01-31 11:49       ` Alistair Francis
2023-01-31 12:30         ` Oleksii
2023-01-20 14:59 ` [PATCH v1 02/14] xen/riscv: add <asm/asm.h> header Oleksii Kurochko
2023-01-20 15:31   ` Andrew Cooper
2023-01-23 11:00     ` Jan Beulich
2023-01-23 11:10       ` Andrew Cooper
2023-01-22 22:58   ` Alistair Francis
2023-01-20 14:59 ` [PATCH v1 03/14] xen/riscv: add <asm/riscv_encoding.h header Oleksii Kurochko
2023-01-22 23:24   ` Alistair Francis
2023-01-23 13:52   ` Jan Beulich
2023-01-23 14:04     ` Oleksii
2023-01-23 14:06       ` Jan Beulich
2023-01-20 14:59 ` [PATCH v1 04/14] xen/riscv: add <asm/csr.h> header Oleksii Kurochko
2023-01-22 23:25   ` Alistair Francis
2023-01-23 13:57   ` Jan Beulich
2023-01-23 14:23     ` Oleksii
2023-01-23 14:31       ` Jan Beulich
2023-01-20 14:59 ` [PATCH v1 05/14] xen/riscv: add early_printk_hnum() function Oleksii Kurochko
2023-01-20 15:39   ` Andrew Cooper
2023-01-23 12:05     ` Oleksii
2023-01-23 11:10   ` Jan Beulich
2023-01-20 14:59 ` [PATCH v1 06/14] xen/riscv: introduce exception context Oleksii Kurochko
2023-01-20 15:54   ` Andrew Cooper
2023-01-23 12:03     ` Oleksii
2023-01-23 12:25       ` Andrew Cooper
2023-01-23 11:13   ` Jan Beulich [this message]
2023-01-20 14:59 ` [PATCH v1 07/14] xen/riscv: introduce exception handlers implementation Oleksii Kurochko
2023-01-22 23:29   ` Alistair Francis
2023-01-23 11:17   ` Jan Beulich
2023-01-23 15:04     ` Oleksii
2023-01-23 11:50   ` Andrew Cooper
2023-01-23 12:41     ` Jan Beulich
2023-01-23 15:17     ` Oleksii
2023-01-23 20:09       ` Andrew Cooper
2023-01-25 14:44     ` Oleksii
2023-01-20 14:59 ` [PATCH v1 08/14] xen/riscv: introduce decode_cause() stuff Oleksii Kurochko
2023-01-22 23:38   ` Alistair Francis
2023-01-23 12:09   ` Andrew Cooper
2023-01-20 14:59 ` [PATCH v1 09/14] xen/riscv: introduce do_unexpected_trap() Oleksii Kurochko
2023-01-22 23:39   ` Alistair Francis
2023-01-25 17:01     ` Oleksii
2023-01-25 17:11       ` Julien Grall
2023-01-25 17:15       ` Andrew Cooper
2023-01-26  8:40         ` Oleksii
2023-01-20 14:59 ` [PATCH v1 10/14] xen/riscv: mask all interrupts Oleksii Kurochko
2023-01-22 23:40   ` Alistair Francis
2023-01-20 14:59 ` [PATCH v1 11/14] xen/riscv: introduce setup_trap_handler() Oleksii Kurochko
2023-01-22 23:41   ` Alistair Francis
2023-01-23 23:21   ` Andrew Cooper
2023-01-20 14:59 ` [PATCH v1 12/14] xen/riscv: introduce an implementation of macros from <asm/bug.h> Oleksii Kurochko
2023-01-23 11:37   ` Jan Beulich
2023-01-20 14:59 ` [PATCH v1 13/14] xen/riscv: test basic handling stuff Oleksii Kurochko
2023-01-20 14:59 ` [PATCH v1 14/14] automation: add smoke test to verify macros from bug.h Oleksii Kurochko
2023-01-24 23:53   ` Stefano Stabellini

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