From: Akira Yokosawa <akiyks@gmail.com>
To: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
Cc: perfbook@vger.kernel.org, Akira Yokosawa <akiyks@gmail.com>
Subject: [PATCH 11/14] advsync: Rename Section 'Guarantees' to 'Minimal Guarantees'
Date: Mon, 17 Apr 2017 07:24:56 +0900 [thread overview]
Message-ID: <18c416c3-e94e-bbac-2a22-831f9bf6dd50@gmail.com> (raw)
In-Reply-To: <be8c3cb5-9ee2-9f60-bfcd-e729389304f9@gmail.com>
From 8b244f86f9f9c26e2de37624c5ad9064367c3332 Mon Sep 17 00:00:00 2001
From: Akira Yokosawa <akiyks@gmail.com>
Date: Sun, 16 Apr 2017 15:53:34 +0900
Subject: [PATCH 11/14] advsync: Rename Section 'Guarantees' to 'Minimal Guarantees'
Also make it clear that this section discusses guarantees which
are free of memory barriers.
Signed-off-by: Akira Yokosawa <akiyks@gmail.com>
---
advsync/memorybarriers.tex | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/advsync/memorybarriers.tex b/advsync/memorybarriers.tex
index 0cd690b..6cf25a9 100644
--- a/advsync/memorybarriers.tex
+++ b/advsync/memorybarriers.tex
@@ -1289,10 +1289,11 @@ x = LOAD *D, STORE *A = 5
the second of which will almost certainly result in a malfunction, since it set
the address \emph{after} attempting to read the register.
-\subsection{Guarantees}
-\label{sec:advsync:Guarantees}
+\subsection{Minimal Guarantees}
+\label{sec:advsync:Minimal Guarantees}
-There are some minimal guarantees that may be expected of a CPU:
+In our abstract memory model, there are some minimal guarantees of ordering
+that may be expected of a CPU without any need of memory barriers:
\begin{enumerate}
\item On any given CPU, dependent memory accesses will be issued in order,
--
2.7.4
next prev parent reply other threads:[~2017-04-16 22:24 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-16 22:11 [PATCH 00/14] advsync: Use pseudo asm in code sequence Akira Yokosawa
2017-04-16 22:13 ` [PATCH 01/14] advsync: Use pseudo asm in sequence in 'Paring' section Akira Yokosawa
2017-04-16 22:14 ` [PATCH 02/14] advsync: Substitute READ_ONCE()/WRITE_ONCE() for ACCESS_ONCE() Akira Yokosawa
2017-04-16 22:15 ` [PATCH 03/14] advsync: Use pseudo asm in sequence in 'Review of Locking Impl' Akira Yokosawa
2017-04-16 22:17 ` [PATCH 04/14] advsync: Backport upstream commits regarding reordering example Akira Yokosawa
2017-04-16 22:18 ` [PATCH 05/14] advsync: Use pseudo asm in " Akira Yokosawa
2017-04-16 22:19 ` [PATCH 06/14] advsync: Use pseudo asm in another " Akira Yokosawa
2017-04-16 22:19 ` [PATCH 07/14] advsync: Avoid indent after minipages Akira Yokosawa
2017-04-16 22:20 ` [PATCH 08/14] advsync: Add footnote to imply necessity of data dependency barrier Akira Yokosawa
2017-04-16 22:22 ` [PATCH 09/14] advsync: Use READ_ONCE()/WRITE_ONCE() in sequence of 'Device Operations' Akira Yokosawa
2017-04-16 22:23 ` [PATCH 10/14] advsync: Use READ_ONCE()/WRITE_ONCE() in sequence in 'Guarantees' Akira Yokosawa
2017-04-16 22:24 ` Akira Yokosawa [this message]
2017-04-16 22:25 ` [PATCH 12/14] advsync: Add another footnote implying data dependency barrier Akira Yokosawa
2017-04-16 22:26 ` [PATCH 13/14] advsync: Use pseudo asm in sequence in 'Data Dependency Barriers' Akira Yokosawa
2017-04-16 22:27 ` [PATCH 14/14] advsync: Use pseudo asm in sequence in 'SMP Barrier Pairing' Akira Yokosawa
2017-04-17 15:39 ` [PATCH 00/14] advsync: Use pseudo asm in code sequence Paul E. McKenney
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