diff for duplicates of <1908894.Nkk1LXQkFm@debian64> diff --git a/a/1.txt b/N1/1.txt index aa21a88..ddbd681 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,110 +1,98 @@ On Sunday, May 08, 2016 08:40:55 PM Benjamin Herrenschmidt wrote: -> On Sun, 2016-05-08 at 00:54 +0200, Christian Lamparter via Linuxppc-d= -ev=20 +> On Sun, 2016-05-08 at 00:54 +0200, Christian Lamparter via Linuxppc-dev > wrote: > > I've been looking in getting the MyBook Live Duo's USB OTG port > > to function. The SoC is a APM82181. Which has a PowerPC 464 core > > and related to the supported canyonlands architecture in > > arch/powerpc/. -> >=20 -> > Currently in -next the dwc2 module doesn't load:=20 ->=20 -> Smells like the APM implementation is little endian. You might need t= -o +> > +> > Currently in -next the dwc2 module doesn't load: +> +> Smells like the APM implementation is little endian. You might need to > use a flag to indicate what endian to use instead and set it > appropriately based on some DT properties. -I tried. As per common-properties[0], I added little-endian; but it has= - no -effect. I looked in dwc2_driver_probe and found no way of specifying th= -e -endian of the device. It all comes down to the dwc2_readl & dwc2_writel= - +I tried. As per common-properties[0], I added little-endian; but it has no +effect. I looked in dwc2_driver_probe and found no way of specifying the +endian of the device. It all comes down to the dwc2_readl & dwc2_writel accessors. These - sadly - have been hardwired to use __raw_readl and __raw_writel. So, it's always "native-endian". While common-properties says little-endian should be preferred. -> > dwc2 4bff80000.usbotg: dwc2_core_reset() HANG! AHB Idle GRSTCTL=3D8= -0 +> > dwc2 4bff80000.usbotg: dwc2_core_reset() HANG! AHB Idle GRSTCTL=80 > > dwc2 4bff80000.usbotg: Bad value for GSNPSID: 0x0a29544f -> >=20 +> > > > Looking at the Bad GSNPSID value: 0x0a29544f. It is obvious that > > this is an endian problem. git finds this patch: -> >=20 +> > > > commit 95c8bc3609440af5e4a4f760b8680caea7424396 -> > Author: Antti Sepp=E4l=E4 <a.seppala@gmail.com> +> > Author: Antti Seppälä <a.seppala@gmail.com> > > Date: Thu Aug 20 21:41:07 2015 +0300 -> >=20 +> > > > usb: dwc2: Use platform endianness when accessing registers -> >=20 +> > > > This patch is necessary to access dwc2 registers correctly on > > big-endian -> > systems such as the mips based SoCs made by Lantiq. Then dwc2 c= -an +> > systems such as the mips based SoCs made by Lantiq. Then dwc2 can > > be -> > used to replace ifx-hcd driver for Lantiq platforms found e.g. = -in +> > used to replace ifx-hcd driver for Lantiq platforms found e.g. in > > OpenWrt. -> > =20 +> > > > The patch was autogenerated with the following commands: > > $EDITOR core.h > > sed -i "s/\<readl\>/dwc2_readl/g" *.c hcd.h hw.h > > sed -i "s/\<writel\>/dwc2_writel/g" *.c hcd.h hw.h -> > =20 +> > > > Some files were then hand-edited to fix checkpatch.pl warnings > > about > > too long lines. -> >=20 -> > which unfortunately, broke the USB-OTG port on the MyBook Live Duo.= - +> > +> > which unfortunately, broke the USB-OTG port on the MyBook Live Duo. > > Reverting to the readl / writel: -> >=20 -> > ---=20 +> > +> > --- > > diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h > > index 3c58d63..c021c1f 100644 > > --- a/drivers/usb/dwc2/core.h > > +++ b/drivers/usb/dwc2/core.h > > @@ -66,7 +66,7 @@ -> > =20 +> > > > static inline u32 dwc2_readl(const void __iomem *addr) > > { -> > -=09u32 value =3D __raw_readl(addr); -> > +=09u32 value =3D readl(addr); -> > =20 -> > =09/* In order to preserve endianness __raw_* operation is +> > - u32 value = __raw_readl(addr); +> > + u32 value = readl(addr); +> > +> > /* In order to preserve endianness __raw_* operation is > > used. Therefore -> > =09 * a barrier is needed to ensure IO access is not re-ordered=20= - +> > * a barrier is needed to ensure IO access is not re-ordered > > across > > @@ -78,7 +78,7 @@ static inline u32 dwc2_readl(const void __iomem > > *addr) -> > =20 +> > > > static inline void dwc2_writel(u32 value, void __iomem *addr) > > { -> > -=09__raw_writel(value, addr); -> > +=09writel(value, addr); -> > =20 -> > =09/* -> > =09 * In order to preserve endianness __raw_* operation is +> > - __raw_writel(value, addr); +> > + writel(value, addr); +> > +> > /* +> > * In order to preserve endianness __raw_* operation is > > used. Therefore -> >=20 +> > > > --- -> >=20 +> > > > restores the dwc-otg port to full working order: -> > dwc2 4bff80000.usbotg: Specified GNPTXFDEP=3D1024 > 256 +> > dwc2 4bff80000.usbotg: Specified GNPTXFDEP=1024 > 256 > > dwc2 4bff80000.usbotg: EPs: 3, shared fifos, 2042 entries in SPRAM > > dwc2 4bff80000.usbotg: DWC OTG Controller -> > dwc2 4bff80000.usbotg: new USB bus registered, assigned bus number = -1 +> > dwc2 4bff80000.usbotg: new USB bus registered, assigned bus number 1 > > dwc2 4bff80000.usbotg: irq 33, io mem 0x00000000 > > hub 1-0:1.0: USB hub found > > hub 1-0:1.0: 1 port detected > > root@mbl:~# usb 1-1: new high-speed USB device number 2 using dwc2 -> >=20 +> > > > So, what to do? ^^^ Regards, Christian -[0] <http://lxr.free-electrons.com/source/Documentation/devicetree/bind= -ings/common-properties.txt> +[0] <http://lxr.free-electrons.com/source/Documentation/devicetree/bindings/common-properties.txt> diff --git a/a/content_digest b/N1/content_digest index 0f5ec61..ec7be18 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -13,114 +13,102 @@ "\00:1\0" "b\0" "On Sunday, May 08, 2016 08:40:55 PM Benjamin Herrenschmidt wrote:\n" - "> On Sun, 2016-05-08 at 00:54 +0200, Christian Lamparter via Linuxppc-d=\n" - "ev=20\n" + "> On Sun, 2016-05-08 at 00:54 +0200, Christian Lamparter via Linuxppc-dev \n" "> wrote:\n" "> > I've been looking in getting the MyBook Live Duo's USB OTG port\n" "> > to function. The SoC is a APM82181. Which has a PowerPC 464 core\n" "> > and related to the supported canyonlands architecture in\n" "> > arch/powerpc/.\n" - "> >=20\n" - "> > Currently in -next the dwc2 module doesn't load:=20\n" - ">=20\n" - "> Smells like the APM implementation is little endian. You might need t=\n" - "o\n" + "> > \n" + "> > Currently in -next the dwc2 module doesn't load: \n" + "> \n" + "> Smells like the APM implementation is little endian. You might need to\n" "> use a flag to indicate what endian to use instead and set it\n" "> appropriately based on some DT properties.\n" - "I tried. As per common-properties[0], I added little-endian; but it has=\n" - " no\n" - "effect. I looked in dwc2_driver_probe and found no way of specifying th=\n" - "e\n" - "endian of the device. It all comes down to the dwc2_readl & dwc2_writel=\n" - "\n" + "I tried. As per common-properties[0], I added little-endian; but it has no\n" + "effect. I looked in dwc2_driver_probe and found no way of specifying the\n" + "endian of the device. It all comes down to the dwc2_readl & dwc2_writel\n" "accessors. These - sadly - have been hardwired to use __raw_readl and\n" "__raw_writel. So, it's always \"native-endian\". While common-properties\n" "says little-endian should be preferred.\n" "\n" - "> > dwc2 4bff80000.usbotg: dwc2_core_reset() HANG! AHB Idle GRSTCTL=3D8=\n" - "0\n" + "> > dwc2 4bff80000.usbotg: dwc2_core_reset() HANG! AHB Idle GRSTCTL=80\n" "> > dwc2 4bff80000.usbotg: Bad value for GSNPSID: 0x0a29544f\n" - "> >=20\n" + "> > \n" "> > Looking at the Bad GSNPSID value: 0x0a29544f. It is obvious that\n" "> > this is an endian problem. git finds this patch:\n" - "> >=20\n" + "> > \n" "> > commit 95c8bc3609440af5e4a4f760b8680caea7424396\n" - "> > Author: Antti Sepp=E4l=E4 <a.seppala@gmail.com>\n" + "> > Author: Antti Sepp\303\244l\303\244 <a.seppala@gmail.com>\n" "> > Date: Thu Aug 20 21:41:07 2015 +0300\n" - "> >=20\n" + "> > \n" "> > usb: dwc2: Use platform endianness when accessing registers\n" - "> >=20\n" + "> > \n" "> > This patch is necessary to access dwc2 registers correctly on\n" "> > big-endian\n" - "> > systems such as the mips based SoCs made by Lantiq. Then dwc2 c=\n" - "an\n" + "> > systems such as the mips based SoCs made by Lantiq. Then dwc2 can\n" "> > be\n" - "> > used to replace ifx-hcd driver for Lantiq platforms found e.g. =\n" - "in\n" + "> > used to replace ifx-hcd driver for Lantiq platforms found e.g. in\n" "> > OpenWrt.\n" - "> > =20\n" + "> > \n" "> > The patch was autogenerated with the following commands:\n" "> > $EDITOR core.h\n" "> > sed -i \"s/\\<readl\\>/dwc2_readl/g\" *.c hcd.h hw.h\n" "> > sed -i \"s/\\<writel\\>/dwc2_writel/g\" *.c hcd.h hw.h\n" - "> > =20\n" + "> > \n" "> > Some files were then hand-edited to fix checkpatch.pl warnings\n" "> > about\n" "> > too long lines.\n" - "> >=20\n" - "> > which unfortunately, broke the USB-OTG port on the MyBook Live Duo.=\n" - "\n" + "> > \n" + "> > which unfortunately, broke the USB-OTG port on the MyBook Live Duo.\n" "> > Reverting to the readl / writel:\n" - "> >=20\n" - "> > ---=20\n" + "> > \n" + "> > --- \n" "> > diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h\n" "> > index 3c58d63..c021c1f 100644\n" "> > --- a/drivers/usb/dwc2/core.h\n" "> > +++ b/drivers/usb/dwc2/core.h\n" "> > @@ -66,7 +66,7 @@\n" - "> > =20\n" + "> > \n" "> > static inline u32 dwc2_readl(const void __iomem *addr)\n" "> > {\n" - "> > -=09u32 value =3D __raw_readl(addr);\n" - "> > +=09u32 value =3D readl(addr);\n" - "> > =20\n" - "> > =09/* In order to preserve endianness __raw_* operation is\n" + "> > -\tu32 value = __raw_readl(addr);\n" + "> > +\tu32 value = readl(addr);\n" + "> > \n" + "> > \t/* In order to preserve endianness __raw_* operation is\n" "> > used. Therefore\n" - "> > =09 * a barrier is needed to ensure IO access is not re-ordered=20=\n" - "\n" + "> > \t * a barrier is needed to ensure IO access is not re-ordered \n" "> > across\n" "> > @@ -78,7 +78,7 @@ static inline u32 dwc2_readl(const void __iomem\n" "> > *addr)\n" - "> > =20\n" + "> > \n" "> > static inline void dwc2_writel(u32 value, void __iomem *addr)\n" "> > {\n" - "> > -=09__raw_writel(value, addr);\n" - "> > +=09writel(value, addr);\n" - "> > =20\n" - "> > =09/*\n" - "> > =09 * In order to preserve endianness __raw_* operation is\n" + "> > -\t__raw_writel(value, addr);\n" + "> > +\twritel(value, addr);\n" + "> > \n" + "> > \t/*\n" + "> > \t * In order to preserve endianness __raw_* operation is\n" "> > used. Therefore\n" - "> >=20\n" + "> > \n" "> > ---\n" - "> >=20\n" + "> > \n" "> > restores the dwc-otg port to full working order:\n" - "> > dwc2 4bff80000.usbotg: Specified GNPTXFDEP=3D1024 > 256\n" + "> > dwc2 4bff80000.usbotg: Specified GNPTXFDEP=1024 > 256\n" "> > dwc2 4bff80000.usbotg: EPs: 3, shared fifos, 2042 entries in SPRAM\n" "> > dwc2 4bff80000.usbotg: DWC OTG Controller\n" - "> > dwc2 4bff80000.usbotg: new USB bus registered, assigned bus number =\n" - "1\n" + "> > dwc2 4bff80000.usbotg: new USB bus registered, assigned bus number 1\n" "> > dwc2 4bff80000.usbotg: irq 33, io mem 0x00000000\n" "> > hub 1-0:1.0: USB hub found\n" "> > hub 1-0:1.0: 1 port detected\n" "> > root@mbl:~# usb 1-1: new high-speed USB device number 2 using dwc2\n" - "> >=20\n" + "> > \n" "> > So, what to do?\n" " ^^^\n" "\n" "Regards,\n" "Christian\n" "\n" - "[0] <http://lxr.free-electrons.com/source/Documentation/devicetree/bind=\n" - ings/common-properties.txt> + [0] <http://lxr.free-electrons.com/source/Documentation/devicetree/bindings/common-properties.txt> -410e5357ba828568de61ef849a6ffac0b7adfbd463dbba3245a8e16e8f573448 +690de8a7656289574ebb0e70a69f98f1caa201096f8cffdfc5258ca791f5990b
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