From: Sebastian Huber <sebastian.huber@embedded-brains.de>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>
Cc: Conor Dooley <conor@kernel.org>,
qemu-devel <qemu-devel@nongnu.org>,
Conor Dooley <conor.dooley@microchip.com>,
Bin Meng <bin.meng@windriver.com>,
alistair francis <alistair.francis@wdc.com>,
qemu-riscv@nongnu.org
Subject: Re: [PATCH 0/5] Improve Microchip Polarfire SoC customization
Date: Fri, 21 Feb 2025 01:13:00 +0100 (CET) [thread overview]
Message-ID: <1920480470.18351.1740096780484.JavaMail.zimbra@embedded-brains.de> (raw)
In-Reply-To: <ade78f31-5279-4862-acdd-15f083a000e2@linaro.org>
----- Am 20. Feb 2025 um 23:29 schrieb Philippe Mathieu-Daudé philmd@linaro.org:
> Hi Conor,
>
> On 20/2/25 19:30, Conor Dooley wrote:
>> +cc qemu-riscv, Alistar.
>>
>> On Fri, Feb 14, 2025 at 07:24:37AM +0100, Sebastian Huber wrote:
>>> Booting the microchip-icicle-kit machine using the latest PolarFire SoC
>>> Hart Software Services (HSS) no longer works since Qemu lacks support
>>> for several registers (clocks, DRAM controller). Also reading from the
>>> SDCard does not work currently.
>>
>> On that note, I think the inaccurate docs about polarfire should be
>> removed. There's a wiki page here with dead links, or links to things
>> that do not work anymore:
>> https://wiki.qemu.org/Documentation/Platforms/RISCV#Microchip_PolarFire_SoC_Icicle_Kit
>> I think the whole section should be removed, find it kinda odd that
>> there's a polarfire section but not for any other board. Either way,
>> it's talking about something that just does not work, the current HSS
>> and Yocto don't boot.
>>
>> There's also a docs page here:
>> https://www.qemu.org/docs/master/system/riscv/microchip-icicle-kit.html
>> that has a copy of the table your patch 4 modifies, that probably should
>> be updated to match your changes.
>>
>> In a similar vein to the wiki, it talks about the HSS and booting a
>> yocto wic image. I think those should be deleted since they don't work.
>>
>> Alistar/Other RISC-V folks, what do you think? Bin wrote the port but
>> seems to be AFK and I don't have the capacity to fix any of that stuff
>> on top of what I already do in my spare time - do you agree that
>> deleting the now inaccurate docs makes sense?
>>
>>> In order to allow tests runs for real-time kernels such as RTEMS and
>>> Zephyr, improve the boot customization. This patch set enables a direct
>>> run of kernel executables, for example:
>>>
>>> qemu-system-riscv64 -no-reboot -nographic \
>>> -serial null -serial mon:stdio \
>>> -smp 2 \
>>> -bios none \
>>> -machine microchip-icicle-kit,clint-timebase-frequency=10000000 \
>>> -kernel rtos.elf
>>
>> The series breaks my usage:
>> qemu//build/qemu-system-riscv64 -M microchip-icicle-kit \
>> -m 3G -smp 5 \
>> -kernel vmlinux.bin \
>> -dtb riscvpc.dtb \
>> -initrd initramfs.cpio.gz \
>> -display none -serial null \
>> -serial mon:stdio \
>> -D qemu.log -d unimp
>> opensbi-riscv64-generic-fw_dynamic.bin: No such file or directory
>> qemu-system-riscv64: could not load firmware
>> 'opensbi-riscv64-generic-fw_dynamic.bin'
>> make: *** [Makefile:305: qemu-icicle] Error 1
>>
>> Figure it is likely to be your patch 4? The file does exist, so probably
>> some sort of path-to-it issues?
>
> Maybe missing the -L option?
>
> -L path set the directory for the BIOS, VGA BIOS and keymaps
It was an error in patch 4/5. I sent a v2 version of it.
You have to find the firmware, before you can load it.
--
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next prev parent reply other threads:[~2025-02-21 1:44 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-14 6:24 [PATCH 0/5] Improve Microchip Polarfire SoC customization Sebastian Huber
2025-02-14 6:24 ` [PATCH 1/5] hw/misc: Add MPFS system reset support Sebastian Huber
2025-02-14 6:24 ` [PATCH 2/5] hw/riscv: More flexible FDT placement for MPFS Sebastian Huber
2025-02-24 5:15 ` Alistair Francis
2025-02-14 6:24 ` [PATCH 3/5] hw/riscv: Make FDT optional " Sebastian Huber
2025-02-24 5:22 ` Alistair Francis
2025-02-24 5:43 ` Sebastian Huber
2025-02-24 6:27 ` Alistair Francis
2025-02-14 6:24 ` [PATCH 4/5] hw/riscv: Allow direct start of kernel " Sebastian Huber
2025-02-21 0:11 ` [PATCH v2] " Sebastian Huber
2025-02-14 6:24 ` [PATCH 5/5] hw/riscv: Configurable MPFS CLINT timebase freq Sebastian Huber
2025-02-16 14:06 ` Philippe Mathieu-Daudé
2025-02-20 18:30 ` [PATCH 0/5] Improve Microchip Polarfire SoC customization Conor Dooley
2025-02-20 22:29 ` Philippe Mathieu-Daudé
2025-02-21 0:13 ` Sebastian Huber [this message]
2025-02-24 5:14 ` Alistair Francis
2025-02-24 21:28 ` Conor Dooley
2025-02-26 2:46 ` Alistair Francis
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