diff for duplicates of <1923946.Jvi0TDUXFC@wasted.cogentembedded.com> diff --git a/a/1.txt b/N1/1.txt index 8f0c557..9cd205c 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,3 +1,34 @@ +From: Haishuang Yan <yanhaishuang@cmss.chinamobile.com> +Date: Sat, 21 May 2016 18:17:35 +0800 + +> In gre6 xmit path, we are sending a GRE packet, so set fl6 proto +> to IPPROTO_GRE properly. +> +> Signed-off-by: Haishuang Yan <yanhaishuang@cmss.chinamobile.com> + +Applied. + +On Tue, May 17, 2016 at 05:15:33PM +0200, Geert Uytterhoeven wrote: +> Currently the different SoCs in the R-Car Gen2 family use different +> types of on-chip RAM for the jump stub: +> - R-Car H2 uses Media RAM, +> - R-Car M2-W uses another type of optional On-chip RAM, as it doesn't +> have Media RAM, +> - R-Car M2-N uses Inter Connect RAM in Magnus Damm's "ARM: shmobile: +> r8a7793 boot address update". +> +> As all R-Car Gen2 SoCs have 4 KiB of Inter Connect RAM, consolidate the +> code by always using that. +> +> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> +> --- +> Tested on r8a7790/lager and r8a7791/koelsch. +> --- +> arch/arm/mach-shmobile/pm-rcar-gen2.c | 13 ++++--------- +> 1 file changed, 4 insertions(+), 9 deletions(-) + +Thanks, I have queued this up. + Add the initial device tree for the R8A7792 SoC based Blanche board. The board has 2 debug serial ports: SCIF0 and SCIF3; include support for them, so that the serial console can work. diff --git a/a/content_digest b/N1/content_digest index b0fad59..97e6e40 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,7 +1,18 @@ + "ref\01463825855-7363-1-git-send-email-yanhaishuang@cmss.chinamobile.com\0" + "ref\01463825855-7363-2-git-send-email-yanhaishuang@cmss.chinamobile.com\0" + "ref\01463498133-23918-1-git-send-email-geert+renesas@glider.be\0" "ref\013205049.n7pM8utpHF@wasted.cogentembedded.com\0" + "From\0David Miller <davem@davemloft.net>\0" + "From\0Simon Horman <horms@verge.net.au>\0" "From\0Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>\0" + "Subject\0Re: [PATCH v2 2/2] ip6_gre: Set flowi6_proto as IPPROTO_GRE in xmit path.\0" + "Subject\0Re: [PATCH] ARM: shmobile: rcar-gen2: Use ICRAM1 for jump stub on all SoCs\0" "Subject\0[PATCH 12/13] ARM: dts: blanche: initial device tree\0" + "Date\0Tue, 24 May 2016 14:34:22 -0700 (PDT)\0" + "Date\0Wed, 25 May 2016 10:01:51 +0900\0" "Date\0Wed, 01 Jun 2016 01:32:35 +0300\0" + "To\0yanhaishuang@cmss.chinamobile.com\0" + "To\0Geert Uytterhoeven <geert+renesas@glider.be>\0" "To\0horms@verge.net.au" linux-renesas-soc@vger.kernel.org robh+dt@kernel.org @@ -10,11 +21,50 @@ ijc+devicetree@hellion.org.uk galak@codeaurora.org " devicetree@vger.kernel.org\0" + "Cc\0kuznet@ms2.inr.ac.ru" + jmorris@namei.org + yoshfuji@linux-ipv6.org + netdev@vger.kernel.org + " linux-kernel@vger.kernel.org\0" + "Cc\0Magnus Damm <magnus.damm@gmail.com>" + linux-renesas-soc@vger.kernel.org + " linux-arm-kernel@lists.infradead.org\0" "Cc\0magnus.damm@gmail.com" linux@arm.linux.org.uk " linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" + "From: Haishuang Yan <yanhaishuang@cmss.chinamobile.com>\n" + "Date: Sat, 21 May 2016 18:17:35 +0800\n" + "\n" + "> In gre6 xmit path, we are sending a GRE packet, so set fl6 proto\n" + "> to IPPROTO_GRE properly.\n" + "> \n" + "> Signed-off-by: Haishuang Yan <yanhaishuang@cmss.chinamobile.com>\n" + "\n" + "Applied.\n" + "\n" + "On Tue, May 17, 2016 at 05:15:33PM +0200, Geert Uytterhoeven wrote:\n" + "> Currently the different SoCs in the R-Car Gen2 family use different\n" + "> types of on-chip RAM for the jump stub:\n" + "> - R-Car H2 uses Media RAM,\n" + "> - R-Car M2-W uses another type of optional On-chip RAM, as it doesn't\n" + "> have Media RAM,\n" + "> - R-Car M2-N uses Inter Connect RAM in Magnus Damm's \"ARM: shmobile:\n" + "> r8a7793 boot address update\".\n" + "> \n" + "> As all R-Car Gen2 SoCs have 4 KiB of Inter Connect RAM, consolidate the\n" + "> code by always using that.\n" + "> \n" + "> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>\n" + "> ---\n" + "> Tested on r8a7790/lager and r8a7791/koelsch.\n" + "> ---\n" + "> arch/arm/mach-shmobile/pm-rcar-gen2.c | 13 ++++---------\n" + "> 1 file changed, 4 insertions(+), 9 deletions(-)\n" + "\n" + "Thanks, I have queued this up.\n" + "\n" "Add the initial device tree for the R8A7792 SoC based Blanche board.\n" "The board has 2 debug serial ports: SCIF0 and SCIF3; include support for\n" "them, so that the serial console can work.\n" @@ -88,4 +138,4 @@ "+\tstatus = \"okay\";\n" +}; -e873b533df2c6953b7b5b3ddf36f77c8579322c194c62e37d4dc6f68ed1ee82c +262303bf153783a846c2725b39967e2ecdf710349f19a085ca74907a67851483
diff --git a/a/1.txt b/N2/1.txt index 8f0c557..bd8d800 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -53,7 +53,7 @@ Index: renesas/arch/arm/boot/dts/r8a7792-blanche.dts + stdout-path = "serial0:115200n8"; + }; + -+ memory@40000000 { ++ memory at 40000000 { + device_type = "memory"; + reg = <0 0x40000000 0 0x40000000>; + }; diff --git a/a/content_digest b/N2/content_digest index b0fad59..6a841d3 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,18 +1,8 @@ "ref\013205049.n7pM8utpHF@wasted.cogentembedded.com\0" - "From\0Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>\0" + "From\0sergei.shtylyov@cogentembedded.com (Sergei Shtylyov)\0" "Subject\0[PATCH 12/13] ARM: dts: blanche: initial device tree\0" "Date\0Wed, 01 Jun 2016 01:32:35 +0300\0" - "To\0horms@verge.net.au" - linux-renesas-soc@vger.kernel.org - robh+dt@kernel.org - pawel.moll@arm.com - mark.rutland@arm.com - ijc+devicetree@hellion.org.uk - galak@codeaurora.org - " devicetree@vger.kernel.org\0" - "Cc\0magnus.damm@gmail.com" - linux@arm.linux.org.uk - " linux-arm-kernel@lists.infradead.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Add the initial device tree for the R8A7792 SoC based Blanche board.\n" @@ -70,7 +60,7 @@ "+\t\tstdout-path = \"serial0:115200n8\";\n" "+\t};\n" "+\n" - "+\tmemory@40000000 {\n" + "+\tmemory at 40000000 {\n" "+\t\tdevice_type = \"memory\";\n" "+\t\treg = <0 0x40000000 0 0x40000000>;\n" "+\t};\n" @@ -88,4 +78,4 @@ "+\tstatus = \"okay\";\n" +}; -e873b533df2c6953b7b5b3ddf36f77c8579322c194c62e37d4dc6f68ed1ee82c +463050911ec89e08a666cd3139457e9c047a42f4c4a5a6d0a0020ce8c569e9a0
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