From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from perceval.ideasonboard.com ([213.167.242.64]:59638 "EHLO perceval.ideasonboard.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753393AbeDZUnM (ORCPT ); Thu, 26 Apr 2018 16:43:12 -0400 From: Laurent Pinchart To: Kieran Bingham Cc: linux-renesas-soc@vger.kernel.org, David Airlie , "open list:DRM DRIVERS FOR RENESAS" , open list Subject: Re: [PATCH 07/17] drm: rcar-du: Add R8A77965 support Date: Thu, 26 Apr 2018 23:43:25 +0300 Message-ID: <1954980.A0ABKULED7@avalon> In-Reply-To: <20180426165346.494-8-kieran.bingham+renesas@ideasonboard.com> References: <20180426165346.494-1-kieran.bingham+renesas@ideasonboard.com> <20180426165346.494-8-kieran.bingham+renesas@ideasonboard.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-renesas-soc-owner@vger.kernel.org List-ID: Hi Kieran, Thank you for the patch. On Thursday, 26 April 2018 19:53:36 EEST Kieran Bingham wrote: > The R8A77965 (M3-N) SoC provides VGA, HDMI and LVDS output. > > This platform is unusual in that the VGA is connected to DU3 leaving DU2 > unpopulated. This is reflected by the channel_mask accordingly. I'd write s/VGA/DPAD/g (or s/VGA/RGB/g) as the DPAD output can be used for other purposes than VGA. > Signed-off-by: Kieran Bingham > --- > drivers/gpu/drm/rcar-du/rcar_du_drv.c | 29 +++++++++++++++++++++++++++ > 1 file changed, 29 insertions(+) > > diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c > b/drivers/gpu/drm/rcar-du/rcar_du_drv.c index d6ebc628fc22..4d195ff8c569 > 100644 > --- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c > +++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c > @@ -246,6 +246,34 @@ static const struct rcar_du_device_info > rcar_du_r8a7796_info = { .dpll_ch = BIT(1), > }; > > +static const struct rcar_du_device_info rcar_du_r8a77965_info = { > + .gen = 3, > + .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK > + | RCAR_DU_FEATURE_EXT_CTRL_REGS > + | RCAR_DU_FEATURE_VSP1_SOURCE, > + .channel_mask = BIT(0) | BIT(1) | BIT(3), Depending on what you think of my suggestions for patch 05/17, you might want to reverse the bit order here. > + .routes = { > + /* > + * R8A77965 has one RGB output, one LVDS output and one HDMI > + * output. > + */ > + [RCAR_DU_OUTPUT_DPAD0] = { > + .possible_crtcs = BIT(2), > + .port = 0, > + }, > + [RCAR_DU_OUTPUT_HDMI0] = { > + .possible_crtcs = BIT(1), > + .port = 1, > + }, > + [RCAR_DU_OUTPUT_LVDS0] = { > + .possible_crtcs = BIT(0), I wonder whether it wouldn't be easier to read if we replaced possible_crtcs with possible_channels, as this structure describes the hardware and had its num_crtcs field replaced with a channel_mask. This would require converting the possible_channels field to a possible_crtcs field in rcar_du_modeset_init(), and I think that no change would be needed in rcar_du_group_setup_defr8() (but please double check). On the other hand, no code would be simplified, and rcar_du_modeset_init() would gain some additional complexity, so it might not be worth it. Either way this patch looks good to me. Reviewed-by: Laurent Pinchart > + .port = 2, > + }, > + }, > + .num_lvds = 1, > + .dpll_ch = BIT(1), > +}; > + > static const struct rcar_du_device_info rcar_du_r8a77970_info = { > .gen = 3, > .features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK > @@ -277,6 +305,7 @@ static const struct of_device_id rcar_du_of_table[] = { > { .compatible = "renesas,du-r8a7794", .data = &rcar_du_r8a7794_info }, > { .compatible = "renesas,du-r8a7795", .data = &rcar_du_r8a7795_info }, > { .compatible = "renesas,du-r8a7796", .data = &rcar_du_r8a7796_info }, > + { .compatible = "renesas,du-r8a77965", .data = &rcar_du_r8a77965_info }, > { .compatible = "renesas,du-r8a77970", .data = &rcar_du_r8a77970_info }, > { } > }; -- Regards, Laurent Pinchart From mboxrd@z Thu Jan 1 00:00:00 1970 From: Laurent Pinchart Subject: Re: [PATCH 07/17] drm: rcar-du: Add R8A77965 support Date: Thu, 26 Apr 2018 23:43:25 +0300 Message-ID: <1954980.A0ABKULED7@avalon> References: <20180426165346.494-1-kieran.bingham+renesas@ideasonboard.com> <20180426165346.494-8-kieran.bingham+renesas@ideasonboard.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id 16E7D6E78F for ; Thu, 26 Apr 2018 20:43:11 +0000 (UTC) In-Reply-To: <20180426165346.494-8-kieran.bingham+renesas@ideasonboard.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Kieran Bingham Cc: linux-renesas-soc@vger.kernel.org, David Airlie , open list , "open list:DRM DRIVERS FOR RENESAS" List-Id: dri-devel@lists.freedesktop.org SGkgS2llcmFuLAoKVGhhbmsgeW91IGZvciB0aGUgcGF0Y2guCgpPbiBUaHVyc2RheSwgMjYgQXBy aWwgMjAxOCAxOTo1MzozNiBFRVNUIEtpZXJhbiBCaW5naGFtIHdyb3RlOgo+IFRoZSBSOEE3Nzk2 NSAoTTMtTikgU29DIHByb3ZpZGVzIFZHQSwgSERNSSBhbmQgTFZEUyBvdXRwdXQuCj4gCj4gVGhp cyBwbGF0Zm9ybSBpcyB1bnVzdWFsIGluIHRoYXQgdGhlIFZHQSBpcyBjb25uZWN0ZWQgdG8gRFUz IGxlYXZpbmcgRFUyCj4gdW5wb3B1bGF0ZWQuIFRoaXMgaXMgcmVmbGVjdGVkIGJ5IHRoZSBjaGFu bmVsX21hc2sgYWNjb3JkaW5nbHkuCgpJJ2Qgd3JpdGUgcy9WR0EvRFBBRC9nIChvciBzL1ZHQS9S R0IvZykgYXMgdGhlIERQQUQgb3V0cHV0IGNhbiBiZSB1c2VkIGZvciAKb3RoZXIgcHVycG9zZXMg dGhhbiBWR0EuCgo+IFNpZ25lZC1vZmYtYnk6IEtpZXJhbiBCaW5naGFtIDxraWVyYW4uYmluZ2hh bStyZW5lc2FzQGlkZWFzb25ib2FyZC5jb20+Cj4gLS0tCj4gIGRyaXZlcnMvZ3B1L2RybS9yY2Fy LWR1L3JjYXJfZHVfZHJ2LmMgfCAyOSArKysrKysrKysrKysrKysrKysrKysrKysrKysKPiAgMSBm aWxlIGNoYW5nZWQsIDI5IGluc2VydGlvbnMoKykKPiAKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9n cHUvZHJtL3JjYXItZHUvcmNhcl9kdV9kcnYuYwo+IGIvZHJpdmVycy9ncHUvZHJtL3JjYXItZHUv cmNhcl9kdV9kcnYuYyBpbmRleCBkNmViYzYyOGZjMjIuLjRkMTk1ZmY4YzU2OQo+IDEwMDY0NAo+ IC0tLSBhL2RyaXZlcnMvZ3B1L2RybS9yY2FyLWR1L3JjYXJfZHVfZHJ2LmMKPiArKysgYi9kcml2 ZXJzL2dwdS9kcm0vcmNhci1kdS9yY2FyX2R1X2Rydi5jCj4gQEAgLTI0Niw2ICsyNDYsMzQgQEAg c3RhdGljIGNvbnN0IHN0cnVjdCByY2FyX2R1X2RldmljZV9pbmZvCj4gcmNhcl9kdV9yOGE3Nzk2 X2luZm8gPSB7IC5kcGxsX2NoID0gIEJJVCgxKSwKPiAgfTsKPiAKPiArc3RhdGljIGNvbnN0IHN0 cnVjdCByY2FyX2R1X2RldmljZV9pbmZvIHJjYXJfZHVfcjhhNzc5NjVfaW5mbyA9IHsKPiArCS5n ZW4gPSAzLAo+ICsJLmZlYXR1cmVzID0gUkNBUl9EVV9GRUFUVVJFX0NSVENfSVJRX0NMT0NLCj4g KwkJICB8IFJDQVJfRFVfRkVBVFVSRV9FWFRfQ1RSTF9SRUdTCj4gKwkJICB8IFJDQVJfRFVfRkVB VFVSRV9WU1AxX1NPVVJDRSwKPiArCS5jaGFubmVsX21hc2sgPSBCSVQoMCkgfCBCSVQoMSkgfCBC SVQoMyksCgpEZXBlbmRpbmcgb24gd2hhdCB5b3UgdGhpbmsgb2YgbXkgc3VnZ2VzdGlvbnMgZm9y IHBhdGNoIDA1LzE3LCB5b3UgbWlnaHQgd2FudCAKdG8gcmV2ZXJzZSB0aGUgYml0IG9yZGVyIGhl cmUuCgo+ICsJLnJvdXRlcyA9IHsKPiArCQkvKgo+ICsJCSAqIFI4QTc3OTY1IGhhcyBvbmUgUkdC IG91dHB1dCwgb25lIExWRFMgb3V0cHV0IGFuZCBvbmUgSERNSQo+ICsJCSAqIG91dHB1dC4KPiAr CQkgKi8KPiArCQlbUkNBUl9EVV9PVVRQVVRfRFBBRDBdID0gewo+ICsJCQkucG9zc2libGVfY3J0 Y3MgPSBCSVQoMiksCj4gKwkJCS5wb3J0ID0gMCwKPiArCQl9LAo+ICsJCVtSQ0FSX0RVX09VVFBV VF9IRE1JMF0gPSB7Cj4gKwkJCS5wb3NzaWJsZV9jcnRjcyA9IEJJVCgxKSwKPiArCQkJLnBvcnQg PSAxLAo+ICsJCX0sCj4gKwkJW1JDQVJfRFVfT1VUUFVUX0xWRFMwXSA9IHsKPiArCQkJLnBvc3Np YmxlX2NydGNzID0gQklUKDApLAoKSSB3b25kZXIgd2hldGhlciBpdCB3b3VsZG4ndCBiZSBlYXNp ZXIgdG8gcmVhZCBpZiB3ZSByZXBsYWNlZCBwb3NzaWJsZV9jcnRjcyAKd2l0aCBwb3NzaWJsZV9j aGFubmVscywgYXMgdGhpcyBzdHJ1Y3R1cmUgZGVzY3JpYmVzIHRoZSBoYXJkd2FyZSBhbmQgaGFk IGl0cyAKbnVtX2NydGNzIGZpZWxkIHJlcGxhY2VkIHdpdGggYSBjaGFubmVsX21hc2suIFRoaXMg d291bGQgcmVxdWlyZSBjb252ZXJ0aW5nIAp0aGUgcG9zc2libGVfY2hhbm5lbHMgZmllbGQgdG8g YSBwb3NzaWJsZV9jcnRjcyBmaWVsZCBpbiAKcmNhcl9kdV9tb2Rlc2V0X2luaXQoKSwgYW5kIEkg dGhpbmsgdGhhdCBubyBjaGFuZ2Ugd291bGQgYmUgbmVlZGVkIGluIApyY2FyX2R1X2dyb3VwX3Nl dHVwX2RlZnI4KCkgKGJ1dCBwbGVhc2UgZG91YmxlIGNoZWNrKS4gT24gdGhlIG90aGVyIGhhbmQs IG5vIApjb2RlIHdvdWxkIGJlIHNpbXBsaWZpZWQsIGFuZCByY2FyX2R1X21vZGVzZXRfaW5pdCgp IHdvdWxkIGdhaW4gc29tZSAKYWRkaXRpb25hbCBjb21wbGV4aXR5LCBzbyBpdCBtaWdodCBub3Qg YmUgd29ydGggaXQuCgpFaXRoZXIgd2F5IHRoaXMgcGF0Y2ggbG9va3MgZ29vZCB0byBtZS4KClJl dmlld2VkLWJ5OiBMYXVyZW50IFBpbmNoYXJ0IDxsYXVyZW50LnBpbmNoYXJ0QGlkZWFzb25ib2Fy ZC5jb20+Cgo+ICsJCQkucG9ydCA9IDIsCj4gKwkJfSwKPiArCX0sCj4gKwkubnVtX2x2ZHMgPSAx LAo+ICsJLmRwbGxfY2ggPSAgQklUKDEpLAo+ICt9Owo+ICsKPiAgc3RhdGljIGNvbnN0IHN0cnVj dCByY2FyX2R1X2RldmljZV9pbmZvIHJjYXJfZHVfcjhhNzc5NzBfaW5mbyA9IHsKPiAgCS5nZW4g PSAzLAo+ICAJLmZlYXR1cmVzID0gUkNBUl9EVV9GRUFUVVJFX0NSVENfSVJRX0NMT0NLCj4gQEAg LTI3Nyw2ICszMDUsNyBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IG9mX2RldmljZV9pZCByY2FyX2R1 X29mX3RhYmxlW10gPSB7Cj4gIAl7IC5jb21wYXRpYmxlID0gInJlbmVzYXMsZHUtcjhhNzc5NCIs IC5kYXRhID0gJnJjYXJfZHVfcjhhNzc5NF9pbmZvIH0sCj4gIAl7IC5jb21wYXRpYmxlID0gInJl bmVzYXMsZHUtcjhhNzc5NSIsIC5kYXRhID0gJnJjYXJfZHVfcjhhNzc5NV9pbmZvIH0sCj4gIAl7 IC5jb21wYXRpYmxlID0gInJlbmVzYXMsZHUtcjhhNzc5NiIsIC5kYXRhID0gJnJjYXJfZHVfcjhh Nzc5Nl9pbmZvIH0sCj4gKwl7IC5jb21wYXRpYmxlID0gInJlbmVzYXMsZHUtcjhhNzc5NjUiLCAu ZGF0YSA9ICZyY2FyX2R1X3I4YTc3OTY1X2luZm8gfSwKPiAgCXsgLmNvbXBhdGlibGUgPSAicmVu ZXNhcyxkdS1yOGE3Nzk3MCIsIC5kYXRhID0gJnJjYXJfZHVfcjhhNzc5NzBfaW5mbyB9LAo+ICAJ eyB9Cj4gIH07CgotLSAKUmVnYXJkcywKCkxhdXJlbnQgUGluY2hhcnQKCgoKX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVsIG1haWxpbmcgbGlz dApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0 b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg==