diff for duplicates of <1980629.1257928058732.JavaMail.ngmail@webmail19.ha2.local> diff --git a/a/1.txt b/N1/1.txt index 015dead..67fbebb 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -2,54 +2,51 @@ Hi Grant: Thanks a lot for your comments! -> On Tue, Nov 10, 2009 at 12:41 PM, Albrecht Dre=DF <albrecht.dress@arcor.d= -e> +> On Tue, Nov 10, 2009 at 12:41 PM, Albrecht Dreß <albrecht.dress@arcor.de> > wrote: > > Merge the WDT code into the GPT interface. > > -> > Signed-off-by: Albrecht Dre=DF <albrecht.dress@arcor.de> +> > Signed-off-by: Albrecht Dreß <albrecht.dress-KvP5wT2u2U0@public.gmane.org> > > --- ->=20 +> > Hi Albrecht, ->=20 +> > Thanks for this work. Comments below. ->=20 +> > > > > Notes: > > -> > The maximum timeout for a 5200 GPT @ 33 MHz clock is ~130 seconds. =A0A= -s +> > The maximum timeout for a 5200 GPT @ 33 MHz clock is ~130 seconds. As > this > > exceeds the range of an int, some api's had to be changed to u64. > > -> > The WDT api is exported as to keep the WDT driver separated from the GP= -T +> > The WDT api is exported as to keep the WDT driver separated from the GPT > > driver. > > > > If GPT0 is used as WDT, this prevents the use of any GPT0 GPT function > (i.e. -> > they will fail with -EBUSY). =A0IOW, the safety function always has +> > they will fail with -EBUSY). IOW, the safety function always has > precedence -> > over the GPT function. =A0If the kernel has been compiled with +> > over the GPT function. If the kernel has been compiled with > > CONFIG_WATCHDOG_NOWAYOUT, this means that GPT0 is locked in WDT mode > until > > the next reboot - this may be a requirement in safety applications. ->=20 +> > This description would look great in the header comment block of the > .c file. O.k. ->=20 +> > Also, as I commented in patch 3; I'd rather see all the WDT > functionality rolled into this driver. As long as you keep the > functional code blocks logically arranged, I think the driver will be > easier to maintain and understand that way. ->=20 -> > =A0arch/powerpc/include/asm/mpc52xx.h =A0 =A0 =A0 =A0| =A0 18 ++- -> > =A0arch/powerpc/platforms/52xx/mpc52xx_gpt.c | =A0281 +> +> > arch/powerpc/include/asm/mpc52xx.h | 18 ++- +> > arch/powerpc/platforms/52xx/mpc52xx_gpt.c | 281 > ++++++++++++++++++++++++++--- -> > =A02 files changed, 270 insertions(+), 29 deletions(-) +> > 2 files changed, 270 insertions(+), 29 deletions(-) > > > > diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c > b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c @@ -57,63 +54,58 @@ O.k. > > --- a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c > > +++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c > > @@ -60,9 +60,13 @@ -> > =A0#include <asm/mpc52xx.h> +> > #include <asm/mpc52xx.h> > > -> > =A0MODULE_DESCRIPTION("Freescale MPC52xx gpt driver"); +> > MODULE_DESCRIPTION("Freescale MPC52xx gpt driver"); > > -MODULE_AUTHOR("Sascha Hauer, Grant Likely"); -> > +MODULE_AUTHOR("Sascha Hauer, Grant Likely, Albrecht Dre=DF"); -> > =A0MODULE_LICENSE("GPL"); +> > +MODULE_AUTHOR("Sascha Hauer, Grant Likely, Albrecht Dreß"); +> > MODULE_LICENSE("GPL"); > > > > +#if (defined(CONFIG_MPC5200_WDT)) || > (defined(CONFIG_MPC5200_WDT_MODULE)) > > +#define HAVE_MPC5200_WDT > > +#endif > > + -> > =A0/** -> > =A0* struct mpc52xx_gpt - Private data structure for MPC52xx GPT driver -> > =A0* @dev: pointer to device structure +> > /** +> > * struct mpc52xx_gpt - Private data structure for MPC52xx GPT driver +> > * @dev: pointer to device structure > > @@ -70,6 +74,8 @@ MODULE_LICENSE("GPL"); -> > =A0* @lock: spinlock to coordinate between different functions. -> > =A0* @of_gc: of_gpio_chip instance structure; used when GPIO is enabled -> > =A0* @irqhost: Pointer to irq_host instance; used when IRQ mode is +> > * @lock: spinlock to coordinate between different functions. +> > * @of_gc: of_gpio_chip instance structure; used when GPIO is enabled +> > * @irqhost: Pointer to irq_host instance; used when IRQ mode is > supported -> > + * @wdt_mode: only used for gpt 0: 0 gpt-only timer, 1 can be used as = -a -> > + * =A0 =A0 =A0 =A0 =A0 =A0wdt, 2 currently used as wdt, cannot be used= - as gpt -> > =A0*/ -> > =A0struct mpc52xx_gpt_priv { -> > =A0 =A0 =A0 =A0struct list_head list; =A0 =A0 =A0 =A0 =A0/* List of all= - GPT devices */ +> > + * @wdt_mode: only used for gpt 0: 0 gpt-only timer, 1 can be used as a +> > + * wdt, 2 currently used as wdt, cannot be used as gpt +> > */ +> > struct mpc52xx_gpt_priv { +> > struct list_head list; /* List of all GPT devices */ > > @@ -78,6 +84,9 @@ struct mpc52xx_gpt_priv { -> > =A0 =A0 =A0 =A0spinlock_t lock; -> > =A0 =A0 =A0 =A0struct irq_host *irqhost; -> > =A0 =A0 =A0 =A0u32 ipb_freq; +> > spinlock_t lock; +> > struct irq_host *irqhost; +> > u32 ipb_freq; > > +#if defined(HAVE_MPC5200_WDT) -> > + =A0 =A0 =A0 u8 wdt_mode; +> > + u8 wdt_mode; > > +#endif ->=20 +> > I wouldn't bother with the #if/#endif. I'm willing to sacrifice > 32bits for the sake of readability of the code. O.k., will remove it. ->=20 -> > +#define NS_PER_SEC =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 1000000000L= -L +> +> > +#define NS_PER_SEC 1000000000LL > > + -> > +#define MPC52xx_GPT_CAN_WDT =A0 =A0 =A0 =A0 =A0 =A0(1 << 0) -> > +#define MPC52xx_GPT_IS_WDT =A0 =A0 =A0 =A0 =A0 =A0 (1 << 1) +> > +#define MPC52xx_GPT_CAN_WDT (1 << 0) +> > +#define MPC52xx_GPT_IS_WDT (1 << 1) > > + > > + -> > =A0/* -----------------------------------------------------------------= ----- -> > =A0* Cascaded interrupt controller hooks -> > =A0*/ +> > /* --------------------------------------------------------------------- +> > * Cascaded interrupt controller hooks +> > */ > > @@ -375,36 +393,22 @@ struct mpc52xx_gpt_priv *mpc52xx_gpt_from_irq(int > irq) -> > =A0} -> > =A0EXPORT_SYMBOL(mpc52xx_gpt_from_irq); +> > } +> > EXPORT_SYMBOL(mpc52xx_gpt_from_irq); > > > > -/** > > - * mpc52xx_gpt_start_timer - Set and enable the GPT timer @@ -124,78 +116,62 @@ L > > - * An interrupt will be generated every time the timer fires > > - */ > > -int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, int period, -> > - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0int continuous= -) +> > - int continuous) > > +/* Calculate the timer counter input register MBAR + 0x6n4 from the -> > + * period in ns. =A0The maximum period for 33 MHz IPB clock is ~130s. = -*/ +> > + * period in ns. The maximum period for 33 MHz IPB clock is ~130s. */ > > +static int mpc52xx_gpt_calc_counter_input(u64 period, u64 ipb_freq, -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = -=A0 =A0 =A0 u32 *reg_val) -> > =A0{ -> > - =A0 =A0 =A0 u32 clear, set; -> > =A0 =A0 =A0 =A0u64 clocks; -> > =A0 =A0 =A0 =A0u32 prescale; -> > - =A0 =A0 =A0 unsigned long flags; +> > + u32 *reg_val) +> > { +> > - u32 clear, set; +> > u64 clocks; +> > u32 prescale; +> > - unsigned long flags; > > - -> > - =A0 =A0 =A0 clear =3D MPC52xx_GPT_MODE_MS_MASK | MPC52xx_GPT_MODE_CON= -TINUOUS; -> > - =A0 =A0 =A0 set =3D MPC52xx_GPT_MODE_MS_GPIO | MPC52xx_GPT_MODE_COUNT= -ER_ENABLE; -> > - =A0 =A0 =A0 if (continuous) -> > - =A0 =A0 =A0 =A0 =A0 =A0 =A0 set |=3D MPC52xx_GPT_MODE_CONTINUOUS; +> > - clear = MPC52xx_GPT_MODE_MS_MASK | MPC52xx_GPT_MODE_CONTINUOUS; +> > - set = MPC52xx_GPT_MODE_MS_GPIO | MPC52xx_GPT_MODE_COUNTER_ENABLE; +> > - if (continuous) +> > - set |= MPC52xx_GPT_MODE_CONTINUOUS; > > -> > =A0 =A0 =A0 =A0/* Determine the number of clocks in the requested perio= -d. =A064 bit -> > =A0 =A0 =A0 =A0 * arithmatic is done here to preserve the precision unt= -il the +> > /* Determine the number of clocks in the requested period. 64 bit +> > * arithmatic is done here to preserve the precision until the > value -> > - =A0 =A0 =A0 =A0* is scaled back down into the u32 range. =A0Period is= - in 'ns', +> > - * is scaled back down into the u32 range. Period is in 'ns', > bus -> > - =A0 =A0 =A0 =A0* frequency is in Hz. */ -> > - =A0 =A0 =A0 clocks =3D (u64)period * (u64)gpt->ipb_freq; -> > - =A0 =A0 =A0 do_div(clocks, 1000000000); /* Scale it down to ns range = -*/ -> > + =A0 =A0 =A0 =A0* is scaled back down into the u32 range. */ -> > + =A0 =A0 =A0 clocks =3D period * ipb_freq; -> > + =A0 =A0 =A0 do_div(clocks, NS_PER_SEC); =A0 =A0 =A0 =A0 /* Scale it d= -own to ns range +> > - * frequency is in Hz. */ +> > - clocks = (u64)period * (u64)gpt->ipb_freq; +> > - do_div(clocks, 1000000000); /* Scale it down to ns range */ +> > + * is scaled back down into the u32 range. */ +> > + clocks = period * ipb_freq; +> > + do_div(clocks, NS_PER_SEC); /* Scale it down to ns range > */ ->=20 +> > Nit: I wouldn't bother with the NS_PER_SEC macro personally. ns per s > is such a fundamental property that I'd rather see the actual number. O.k. ->=20 +> > > -> > - =A0 =A0 =A0 /* This device cannot handle a clock count greater than 3= -2 bits +> > - /* This device cannot handle a clock count greater than 32 bits > */ -> > - =A0 =A0 =A0 if (clocks > 0xffffffff) -> > + =A0 =A0 =A0 /* the maximum count is 0x10000 pre-scaler * 0xffff count= - */ -> > + =A0 =A0 =A0 if (clocks > 0xffff0000) -> > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0return -EINVAL; ->=20 +> > - if (clocks > 0xffffffff) +> > + /* the maximum count is 0x10000 pre-scaler * 0xffff count */ +> > + if (clocks > 0xffff0000) +> > return -EINVAL; +> > This a bug fix? Separate patch please. -Ooops, nope. That's wrong. Will remove it. The only *real* bug fix is th= -e fact that the period must be a 64-bit as the timer can serve longer perio= -ds than 2.1 seconds (int limit). I will provide a separate fix for that. +Ooops, nope. That's wrong. Will remove it. The only *real* bug fix is the fact that the period must be a 64-bit as the timer can serve longer periods than 2.1 seconds (int limit). I will provide a separate fix for that. ->=20 -> > =A0 =A0 =A0 =A0/* Calculate the prescaler and count values from the clo= -cks value. -> > @@ -427,9 +431,47 @@ int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_pri= -v +> +> > /* Calculate the prescaler and count values from the clocks value. +> > @@ -427,9 +431,47 @@ int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv > *gpt, int period, -> > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0return -EINVAL; -> > =A0 =A0 =A0 =A0} +> > return -EINVAL; +> > } > > -> > + =A0 =A0 =A0 *reg_val =3D (prescale & 0xffff) << 16 | clocks; -> > + =A0 =A0 =A0 return 0; +> > + *reg_val = (prescale & 0xffff) << 16 | clocks; +> > + return 0; > > +} > > + > > +/** @@ -207,33 +183,30 @@ v > > + * An interrupt will be generated every time the timer fires > > + */ > > +int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, u64 period, -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 int continuous) +> > + int continuous) > > +{ -> > + =A0 =A0 =A0 u32 clear, set; -> > + =A0 =A0 =A0 u32 counter_reg; -> > + =A0 =A0 =A0 unsigned long flags; +> > + u32 clear, set; +> > + u32 counter_reg; +> > + unsigned long flags; > > + > > +#if defined(HAVE_MPC5200_WDT) -> > + =A0 =A0 =A0 /* reject the operation if the timer is used as watchdog = -(gpt 0 +> > + /* reject the operation if the timer is used as watchdog (gpt 0 > only) */ -> > + =A0 =A0 =A0 spin_lock_irqsave(&gpt->lock, flags); -> > + =A0 =A0 =A0 if ((gpt->wdt_mode & MPC52xx_GPT_IS_WDT)) { -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 spin_unlock_irqrestore(&gpt->lock, flags)= -; -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 return -EBUSY; -> > + =A0 =A0 =A0 } -> > + =A0 =A0 =A0 spin_unlock_irqrestore(&gpt->lock, flags); +> > + spin_lock_irqsave(&gpt->lock, flags); +> > + if ((gpt->wdt_mode & MPC52xx_GPT_IS_WDT)) { +> > + spin_unlock_irqrestore(&gpt->lock, flags); +> > + return -EBUSY; +> > + } +> > + spin_unlock_irqrestore(&gpt->lock, flags); > > +#endif ->=20 +> > I think the behaviour needs to be consistent, regardless of > HAVE_MPC5200_WDT state. If the IS_WDT flag is set, then this needs > to bail, even if WDT support is not enabled. -O.k., will do. It's a no-op if WDT support isn't enabled (i.e. IS_WDT is = -never set then), though, see below. +O.k., will do. It's a no-op if WDT support isn't enabled (i.e. IS_WDT is never set then), though, see below. ->=20 +> > Also, move this code block down into the spin lock/unlock block lower > in the function. it doesn't make much sense to grab the spin lock > twice in the same function, and the worst think that can happen if @@ -242,33 +215,28 @@ never set then), though, see below. Ouch. Yes, that's a source for races! ->=20 +> > > + -> > + =A0 =A0 =A0 clear =3D MPC52xx_GPT_MODE_MS_MASK | MPC52xx_GPT_MODE_CON= -TINUOUS; -> > + =A0 =A0 =A0 set =3D MPC52xx_GPT_MODE_MS_GPIO | MPC52xx_GPT_MODE_COUNT= -ER_ENABLE; -> > + =A0 =A0 =A0 if (continuous) -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 set |=3D MPC52xx_GPT_MODE_CONTINUOUS; +> > + clear = MPC52xx_GPT_MODE_MS_MASK | MPC52xx_GPT_MODE_CONTINUOUS; +> > + set = MPC52xx_GPT_MODE_MS_GPIO | MPC52xx_GPT_MODE_COUNTER_ENABLE; +> > + if (continuous) +> > + set |= MPC52xx_GPT_MODE_CONTINUOUS; > > + -> > + =A0 =A0 =A0 if (mpc52xx_gpt_calc_counter_input(period, (u64)gpt->ipb_= -freq, -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = -=A0 =A0 =A0 =A0&counter_reg) !=3D 0) -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 return -EINVAL; +> > + if (mpc52xx_gpt_calc_counter_input(period, (u64)gpt->ipb_freq, +> > + &counter_reg) != 0) +> > + return -EINVAL; > > + -> > =A0 =A0 =A0 =A0/* Set and enable the timer */ -> > =A0 =A0 =A0 =A0spin_lock_irqsave(&gpt->lock, flags); -> > - =A0 =A0 =A0 out_be32(&gpt->regs->count, prescale << 16 | clocks); -> > + =A0 =A0 =A0 out_be32(&gpt->regs->count, counter_reg); -> > =A0 =A0 =A0 =A0clrsetbits_be32(&gpt->regs->mode, clear, set); -> > =A0 =A0 =A0 =A0spin_unlock_irqrestore(&gpt->lock, flags); +> > /* Set and enable the timer */ +> > spin_lock_irqsave(&gpt->lock, flags); +> > - out_be32(&gpt->regs->count, prescale << 16 | clocks); +> > + out_be32(&gpt->regs->count, counter_reg); +> > clrsetbits_be32(&gpt->regs->mode, clear, set); +> > spin_unlock_irqrestore(&gpt->lock, flags); > > -> > @@ -437,12 +479,175 @@ int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_p= -riv +> > @@ -437,12 +479,175 @@ int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv > *gpt, int period, -> > =A0} -> > =A0EXPORT_SYMBOL(mpc52xx_gpt_start_timer); +> > } +> > EXPORT_SYMBOL(mpc52xx_gpt_start_timer); > > > > -void mpc52xx_gpt_stop_timer(struct mpc52xx_gpt_priv *gpt) > > +/** @@ -277,71 +245,68 @@ riv > > + */ > > +u64 mpc52xx_gpt_timer_period(struct mpc52xx_gpt_priv *gpt) > > +{ -> > + =A0 =A0 =A0 u64 period; -> > + =A0 =A0 =A0 u32 prescale; -> > + =A0 =A0 =A0 unsigned long flags; +> > + u64 period; +> > + u32 prescale; +> > + unsigned long flags; > > + -> > + =A0 =A0 =A0 spin_lock_irqsave(&gpt->lock, flags); -> > + =A0 =A0 =A0 period =3D in_be32(&gpt->regs->count); -> > + =A0 =A0 =A0 spin_unlock_irqrestore(&gpt->lock, flags); +> > + spin_lock_irqsave(&gpt->lock, flags); +> > + period = in_be32(&gpt->regs->count); +> > + spin_unlock_irqrestore(&gpt->lock, flags); > > + -> > + =A0 =A0 =A0 prescale =3D period >> 16; -> > + =A0 =A0 =A0 period &=3D 0xffff; -> > + =A0 =A0 =A0 if (prescale =3D=3D 0) -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 prescale =3D 0x10000; -> > + =A0 =A0 =A0 period =3D period * (u64) prescale * NS_PER_SEC; -> > + =A0 =A0 =A0 do_div(period, (u64)gpt->ipb_freq); ->=20 +> > + prescale = period >> 16; +> > + period &= 0xffff; +> > + if (prescale == 0) +> > + prescale = 0x10000; +> > + period = period * (u64) prescale * NS_PER_SEC; +> > + do_div(period, (u64)gpt->ipb_freq); +> > Are the casts necessary? Maybe prescale should just be a u64 value? Good point. Will do that. ->=20 -> > + =A0 =A0 =A0 return period; +> +> > + return period; > > +} > > +EXPORT_SYMBOL(mpc52xx_gpt_timer_period); > > + > > +int mpc52xx_gpt_stop_timer(struct mpc52xx_gpt_priv *gpt) -> > =A0{ -> > + =A0 =A0 =A0 unsigned long flags; +> > { +> > + unsigned long flags; > > + -> > + =A0 =A0 =A0 /* reject the operation if the timer is used as watchdog = -(gpt 0 +> > + /* reject the operation if the timer is used as watchdog (gpt 0 > only) */ -> > + =A0 =A0 =A0 spin_lock_irqsave(&gpt->lock, flags); +> > + spin_lock_irqsave(&gpt->lock, flags); > > +#if defined(HAVE_MPC5200_WDT) -> > + =A0 =A0 =A0 if ((gpt->wdt_mode & MPC52xx_GPT_IS_WDT)) { -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 spin_unlock_irqrestore(&gpt->lock, flags)= -; -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 return -EBUSY; -> > + =A0 =A0 =A0 } +> > + if ((gpt->wdt_mode & MPC52xx_GPT_IS_WDT)) { +> > + spin_unlock_irqrestore(&gpt->lock, flags); +> > + return -EBUSY; +> > + } > > +#endif ->=20 +> > Again, drop the #if/endif wrapper. ->=20 +> > > +/** > > + * mpc52xx_gpt_wdt_release - Release the watchdog so it can be used as > gpt > > + * @gpt_wdt: the watchdog gpt > > + * -> > + * Note: Stops the watchdog if CONFIG_WATCHDOG_NOWAYOUT is not defined= -. +> > + * Note: Stops the watchdog if CONFIG_WATCHDOG_NOWAYOUT is not defined. > > + * the function does not protect itself form being called without a > > + * timer or with a timer which cannot function as wdt. > > + */ > > +int mpc52xx_gpt_wdt_release(struct mpc52xx_gpt_priv *gpt_wdt) > > +{ > > +#if !defined(CONFIG_WATCHDOG_NOWAYOUT) -> > + =A0 =A0 =A0 unsigned long flags; +> > + unsigned long flags; > > + -> > + =A0 =A0 =A0 spin_lock_irqsave(&gpt_wdt->lock, flags); -> > + =A0 =A0 =A0 clrbits32(&gpt_wdt->regs->mode, -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 MPC52xx_GPT_MODE_COUNTER_ENABLE | +> > + spin_lock_irqsave(&gpt_wdt->lock, flags); +> > + clrbits32(&gpt_wdt->regs->mode, +> > + MPC52xx_GPT_MODE_COUNTER_ENABLE | > MPC52xx_GPT_MODE_WDT_EN); -> > + =A0 =A0 =A0 gpt_wdt->wdt_mode &=3D ~MPC52xx_GPT_IS_WDT; -> > + =A0 =A0 =A0 spin_unlock_irqrestore(&gpt_wdt->lock, flags); +> > + gpt_wdt->wdt_mode &= ~MPC52xx_GPT_IS_WDT; +> > + spin_unlock_irqrestore(&gpt_wdt->lock, flags); > > +#endif -> > + =A0 =A0 =A0 return 0; +> > + return 0; > > +} > > +EXPORT_SYMBOL(mpc52xx_gpt_wdt_release); > > + @@ -350,89 +315,73 @@ Good point. Will do that. > > + * mpc52xx_gpt_wdt_stop - Stop the watchdog > > + * @gpt_wdt: the watchdog gpt > > + * -> > + * Note: the function does not protect itself form being called withou= -t +> > + * Note: the function does not protect itself form being called without > a > > + * timer or with a timer which cannot function as wdt. > > + */ > > +int mpc52xx_gpt_wdt_stop(struct mpc52xx_gpt_priv *gpt_wdt) > > +{ -> > + =A0 =A0 =A0 unsigned long flags; +> > + unsigned long flags; > > + -> > + =A0 =A0 =A0 spin_lock_irqsave(&gpt_wdt->lock, flags); -> > + =A0 =A0 =A0 clrbits32(&gpt_wdt->regs->mode, -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 MPC52xx_GPT_MODE_COUNTER_ENABLE | +> > + spin_lock_irqsave(&gpt_wdt->lock, flags); +> > + clrbits32(&gpt_wdt->regs->mode, +> > + MPC52xx_GPT_MODE_COUNTER_ENABLE | > MPC52xx_GPT_MODE_WDT_EN); -> > + =A0 =A0 =A0 gpt_wdt->wdt_mode &=3D ~MPC52xx_GPT_IS_WDT; -> > + =A0 =A0 =A0 spin_unlock_irqrestore(&gpt_wdt->lock, flags); -> > + =A0 =A0 =A0 return 0; +> > + gpt_wdt->wdt_mode &= ~MPC52xx_GPT_IS_WDT; +> > + spin_unlock_irqrestore(&gpt_wdt->lock, flags); +> > + return 0; > > +} > > +EXPORT_SYMBOL(mpc52xx_gpt_wdt_stop); -> > +#endif =A0/* =A0CONFIG_WATCHDOG_NOWAYOUT =A0*/ -> > +#endif =A0/* =A0HAVE_MPC5200_WDT =A0*/ +> > +#endif /* CONFIG_WATCHDOG_NOWAYOUT */ +> > +#endif /* HAVE_MPC5200_WDT */ > > + -> > =A0/* -----------------------------------------------------------------= ----- -> > =A0* of_platform bus binding code -> > =A0*/ +> > /* --------------------------------------------------------------------- +> > * of_platform bus binding code +> > */ > > @@ -473,6 +678,30 @@ static int __devinit mpc52xx_gpt_probe(struct > of_device *ofdev, -> > =A0 =A0 =A0 =A0list_add(&gpt->list, &mpc52xx_gpt_list); -> > =A0 =A0 =A0 =A0mutex_unlock(&mpc52xx_gpt_list_mutex); +> > list_add(&gpt->list, &mpc52xx_gpt_list); +> > mutex_unlock(&mpc52xx_gpt_list_mutex); > > > > +#if defined(HAVE_MPC5200_WDT) -> > + =A0 =A0 =A0 /* check if this device could be a watchdog */ -> > + =A0 =A0 =A0 if (of_get_property(ofdev->node, "fsl,has-wdt", NULL) || -> > + =A0 =A0 =A0 =A0 =A0 of_get_property(ofdev->node, "has-wdt", NULL)) { -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 const u32 *on_boot_wdt; +> > + /* check if this device could be a watchdog */ +> > + if (of_get_property(ofdev->node, "fsl,has-wdt", NULL) || +> > + of_get_property(ofdev->node, "has-wdt", NULL)) { +> > + const u32 *on_boot_wdt; > > + -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 gpt->wdt_mode =3D MPC52xx_GPT_CAN_WDT; +> > + gpt->wdt_mode = MPC52xx_GPT_CAN_WDT; > > + -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* check if the device shall be used as o= -n-boot watchdog +> > + /* check if the device shall be used as on-boot watchdog > */ -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 on_boot_wdt =3D of_get_property(ofdev->no= -de, "wdt,on-boot", +> > + on_boot_wdt = of_get_property(ofdev->node, "wdt,on-boot", > NULL); -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (on_boot_wdt) { -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 gpt->wdt_mode |=3D MPC52x= -x_GPT_IS_WDT; -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (*on_boot_wdt > 0 && -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 mpc52xx_gpt_wdt_s= -tart(gpt, *on_boot_wdt) =3D=3D +> > + if (on_boot_wdt) { +> > + gpt->wdt_mode |= MPC52xx_GPT_IS_WDT; +> > + if (*on_boot_wdt > 0 && +> > + mpc52xx_gpt_wdt_start(gpt, *on_boot_wdt) == > 0) -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_info(= -gpt->dev, -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = -=A0 =A0 =A0"running as wdt, timeout %us\n", -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 = -=A0 =A0 =A0*on_boot_wdt); -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 else -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_info(= -gpt->dev, "reserved as wdt\n"); -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 } else -> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_info(gpt->dev, "can f= -unction as wdt\n"); -> > + =A0 =A0 =A0 } +> > + dev_info(gpt->dev, +> > + "running as wdt, timeout %us\n", +> > + *on_boot_wdt); +> > + else +> > + dev_info(gpt->dev, "reserved as wdt\n"); +> > + } else +> > + dev_info(gpt->dev, "can function as wdt\n"); +> > + } > > +#endif ->=20 +> > Ditto on the #if/endif I don't think it can be removed here. Think about the following: - user has a dtb with fsl,has-wdt and fsl,wdt-on-boot properties and - disables 5200 WDT in the kernel config. -Now the system refuses to use GPT0 as GPT, although the WDT functionality h= -as been disabled. Of course, the dts doesn't fit the kernel config now, bu= -t I think we should catch this case. +Now the system refuses to use GPT0 as GPT, although the WDT functionality has been disabled. Of course, the dts doesn't fit the kernel config now, but I think we should catch this case. -Actually I tried to implement your requirements from <http://lists.ozlabs.o= -rg/pipermail/linuxppc-dev/2009-August/074595.html>: +Actually I tried to implement your requirements from <http://lists.ozlabs.org/pipermail/linuxppc-dev/2009-August/074595.html>: - fsl,has-wdt indicates that the GPT can serve as WDT; -- any access through the wdt api to a wdt-capable gpt actually reserves it = -as wdt; -- the new of property forces reserving the wdt before any gpt api function = -has chance to grab it as gpt. +- any access through the wdt api to a wdt-capable gpt actually reserves it as wdt; +- the new of property forces reserving the wdt before any gpt api function has chance to grab it as gpt. Or did I get something wrong here? @@ -440,6 +389,5 @@ Thanks, Albrecht. Jetzt NEU: Do it youself E-Cards bei Arcor.de! -Stellen Sie Ihr eigenes Unikat zusammen und machen Sie dem Empf=E4nger eine= - ganz pers=F6nliche Freude! +Stellen Sie Ihr eigenes Unikat zusammen und machen Sie dem Empfänger eine ganz persönliche Freude! E-Card Marke Eigenbau: HIER KLICKEN: http://www.arcor.de/rd/footer.ecard diff --git a/a/content_digest b/N1/content_digest index 580a324..c617b56 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,64 +1,61 @@ - "From\0Albrecht Dre\303\237 <albrecht.dress@arcor.de>\0" + "From\0Albrecht Dre\303\237 <albrecht.dress-KvP5wT2u2U0@public.gmane.org>\0" "Subject\0Re: [PATCH 2/3] mpc52xx/wdt: merge WDT code into the GPT\0" "Date\0Wed, 11 Nov 2009 09:27:38 +0100 (CET)\0" - "To\0grant.likely@secretlab.ca\0" - "Cc\0linuxppc-dev@ozlabs.org" - devicetree-discuss@lists.ozlabs.org - " wim@iguana.be\0" + "To\0grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org\0" + "Cc\0linuxppc-dev-mnsaURCQ41sdnm+yROfE0A@public.gmane.org" + devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org + " wim-IQzOog9fTRqzQB+pC5nmwQ@public.gmane.org\0" "\00:1\0" "b\0" "Hi Grant:\n" "\n" "Thanks a lot for your comments!\n" "\n" - "> On Tue, Nov 10, 2009 at 12:41 PM, Albrecht Dre=DF <albrecht.dress@arcor.d=\n" - "e>\n" + "> On Tue, Nov 10, 2009 at 12:41 PM, Albrecht Dre\303\237 <albrecht.dress@arcor.de>\n" "> wrote:\n" "> > Merge the WDT code into the GPT interface.\n" "> >\n" - "> > Signed-off-by: Albrecht Dre=DF <albrecht.dress@arcor.de>\n" + "> > Signed-off-by: Albrecht Dre\303\237 <albrecht.dress-KvP5wT2u2U0@public.gmane.org>\n" "> > ---\n" - ">=20\n" + "> \n" "> Hi Albrecht,\n" - ">=20\n" + "> \n" "> Thanks for this work. Comments below.\n" - ">=20\n" + "> \n" "> >\n" "> > Notes:\n" "> >\n" - "> > The maximum timeout for a 5200 GPT @ 33 MHz clock is ~130 seconds. =A0A=\n" - "s\n" + "> > The maximum timeout for a 5200 GPT @ 33 MHz clock is ~130 seconds. \302\240As\n" "> this\n" "> > exceeds the range of an int, some api's had to be changed to u64.\n" "> >\n" - "> > The WDT api is exported as to keep the WDT driver separated from the GP=\n" - "T\n" + "> > The WDT api is exported as to keep the WDT driver separated from the GPT\n" "> > driver.\n" "> >\n" "> > If GPT0 is used as WDT, this prevents the use of any GPT0 GPT function\n" "> (i.e.\n" - "> > they will fail with -EBUSY). =A0IOW, the safety function always has\n" + "> > they will fail with -EBUSY). \302\240IOW, the safety function always has\n" "> precedence\n" - "> > over the GPT function. =A0If the kernel has been compiled with\n" + "> > over the GPT function. \302\240If the kernel has been compiled with\n" "> > CONFIG_WATCHDOG_NOWAYOUT, this means that GPT0 is locked in WDT mode\n" "> until\n" "> > the next reboot - this may be a requirement in safety applications.\n" - ">=20\n" + "> \n" "> This description would look great in the header comment block of the\n" "> .c file.\n" "\n" "O.k.\n" "\n" - ">=20\n" + "> \n" "> Also, as I commented in patch 3; I'd rather see all the WDT\n" "> functionality rolled into this driver. As long as you keep the\n" "> functional code blocks logically arranged, I think the driver will be\n" "> easier to maintain and understand that way.\n" - ">=20\n" - "> > =A0arch/powerpc/include/asm/mpc52xx.h =A0 =A0 =A0 =A0| =A0 18 ++-\n" - "> > =A0arch/powerpc/platforms/52xx/mpc52xx_gpt.c | =A0281\n" + "> \n" + "> > \302\240arch/powerpc/include/asm/mpc52xx.h \302\240 \302\240 \302\240 \302\240| \302\240 18 ++-\n" + "> > \302\240arch/powerpc/platforms/52xx/mpc52xx_gpt.c | \302\240281\n" "> ++++++++++++++++++++++++++---\n" - "> > =A02 files changed, 270 insertions(+), 29 deletions(-)\n" + "> > \302\2402 files changed, 270 insertions(+), 29 deletions(-)\n" "> >\n" "> > diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c\n" "> b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c\n" @@ -66,63 +63,58 @@ "> > --- a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c\n" "> > +++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c\n" "> > @@ -60,9 +60,13 @@\n" - "> > =A0#include <asm/mpc52xx.h>\n" + "> > \302\240#include <asm/mpc52xx.h>\n" "> >\n" - "> > =A0MODULE_DESCRIPTION(\"Freescale MPC52xx gpt driver\");\n" + "> > \302\240MODULE_DESCRIPTION(\"Freescale MPC52xx gpt driver\");\n" "> > -MODULE_AUTHOR(\"Sascha Hauer, Grant Likely\");\n" - "> > +MODULE_AUTHOR(\"Sascha Hauer, Grant Likely, Albrecht Dre=DF\");\n" - "> > =A0MODULE_LICENSE(\"GPL\");\n" + "> > +MODULE_AUTHOR(\"Sascha Hauer, Grant Likely, Albrecht Dre\303\237\");\n" + "> > \302\240MODULE_LICENSE(\"GPL\");\n" "> >\n" "> > +#if (defined(CONFIG_MPC5200_WDT)) ||\n" "> (defined(CONFIG_MPC5200_WDT_MODULE))\n" "> > +#define HAVE_MPC5200_WDT\n" "> > +#endif\n" "> > +\n" - "> > =A0/**\n" - "> > =A0* struct mpc52xx_gpt - Private data structure for MPC52xx GPT driver\n" - "> > =A0* @dev: pointer to device structure\n" + "> > \302\240/**\n" + "> > \302\240* struct mpc52xx_gpt - Private data structure for MPC52xx GPT driver\n" + "> > \302\240* @dev: pointer to device structure\n" "> > @@ -70,6 +74,8 @@ MODULE_LICENSE(\"GPL\");\n" - "> > =A0* @lock: spinlock to coordinate between different functions.\n" - "> > =A0* @of_gc: of_gpio_chip instance structure; used when GPIO is enabled\n" - "> > =A0* @irqhost: Pointer to irq_host instance; used when IRQ mode is\n" + "> > \302\240* @lock: spinlock to coordinate between different functions.\n" + "> > \302\240* @of_gc: of_gpio_chip instance structure; used when GPIO is enabled\n" + "> > \302\240* @irqhost: Pointer to irq_host instance; used when IRQ mode is\n" "> supported\n" - "> > + * @wdt_mode: only used for gpt 0: 0 gpt-only timer, 1 can be used as =\n" - "a\n" - "> > + * =A0 =A0 =A0 =A0 =A0 =A0wdt, 2 currently used as wdt, cannot be used=\n" - " as gpt\n" - "> > =A0*/\n" - "> > =A0struct mpc52xx_gpt_priv {\n" - "> > =A0 =A0 =A0 =A0struct list_head list; =A0 =A0 =A0 =A0 =A0/* List of all=\n" - " GPT devices */\n" + "> > + * @wdt_mode: only used for gpt 0: 0 gpt-only timer, 1 can be used as a\n" + "> > + * \302\240 \302\240 \302\240 \302\240 \302\240 \302\240wdt, 2 currently used as wdt, cannot be used as gpt\n" + "> > \302\240*/\n" + "> > \302\240struct mpc52xx_gpt_priv {\n" + "> > \302\240 \302\240 \302\240 \302\240struct list_head list; \302\240 \302\240 \302\240 \302\240 \302\240/* List of all GPT devices */\n" "> > @@ -78,6 +84,9 @@ struct mpc52xx_gpt_priv {\n" - "> > =A0 =A0 =A0 =A0spinlock_t lock;\n" - "> > =A0 =A0 =A0 =A0struct irq_host *irqhost;\n" - "> > =A0 =A0 =A0 =A0u32 ipb_freq;\n" + "> > \302\240 \302\240 \302\240 \302\240spinlock_t lock;\n" + "> > \302\240 \302\240 \302\240 \302\240struct irq_host *irqhost;\n" + "> > \302\240 \302\240 \302\240 \302\240u32 ipb_freq;\n" "> > +#if defined(HAVE_MPC5200_WDT)\n" - "> > + =A0 =A0 =A0 u8 wdt_mode;\n" + "> > + \302\240 \302\240 \302\240 u8 wdt_mode;\n" "> > +#endif\n" - ">=20\n" + "> \n" "> I wouldn't bother with the #if/#endif. I'm willing to sacrifice\n" "> 32bits for the sake of readability of the code.\n" "\n" "O.k., will remove it.\n" "\n" - ">=20\n" - "> > +#define NS_PER_SEC =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 1000000000L=\n" - "L\n" + "> \n" + "> > +#define NS_PER_SEC \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 1000000000LL\n" "> > +\n" - "> > +#define MPC52xx_GPT_CAN_WDT =A0 =A0 =A0 =A0 =A0 =A0(1 << 0)\n" - "> > +#define MPC52xx_GPT_IS_WDT =A0 =A0 =A0 =A0 =A0 =A0 (1 << 1)\n" + "> > +#define MPC52xx_GPT_CAN_WDT \302\240 \302\240 \302\240 \302\240 \302\240 \302\240(1 << 0)\n" + "> > +#define MPC52xx_GPT_IS_WDT \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 (1 << 1)\n" "> > +\n" "> > +\n" - "> > =A0/* -----------------------------------------------------------------=\n" - "----\n" - "> > =A0* Cascaded interrupt controller hooks\n" - "> > =A0*/\n" + "> > \302\240/* ---------------------------------------------------------------------\n" + "> > \302\240* Cascaded interrupt controller hooks\n" + "> > \302\240*/\n" "> > @@ -375,36 +393,22 @@ struct mpc52xx_gpt_priv *mpc52xx_gpt_from_irq(int\n" "> irq)\n" - "> > =A0}\n" - "> > =A0EXPORT_SYMBOL(mpc52xx_gpt_from_irq);\n" + "> > \302\240}\n" + "> > \302\240EXPORT_SYMBOL(mpc52xx_gpt_from_irq);\n" "> >\n" "> > -/**\n" "> > - * mpc52xx_gpt_start_timer - Set and enable the GPT timer\n" @@ -133,78 +125,62 @@ "> > - * An interrupt will be generated every time the timer fires\n" "> > - */\n" "> > -int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, int period,\n" - "> > - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0int continuous=\n" - ")\n" + "> > - \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240int continuous)\n" "> > +/* Calculate the timer counter input register MBAR + 0x6n4 from the\n" - "> > + * period in ns. =A0The maximum period for 33 MHz IPB clock is ~130s. =\n" - "*/\n" + "> > + * period in ns. \302\240The maximum period for 33 MHz IPB clock is ~130s. */\n" "> > +static int mpc52xx_gpt_calc_counter_input(u64 period, u64 ipb_freq,\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =\n" - "=A0 =A0 =A0 u32 *reg_val)\n" - "> > =A0{\n" - "> > - =A0 =A0 =A0 u32 clear, set;\n" - "> > =A0 =A0 =A0 =A0u64 clocks;\n" - "> > =A0 =A0 =A0 =A0u32 prescale;\n" - "> > - =A0 =A0 =A0 unsigned long flags;\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 u32 *reg_val)\n" + "> > \302\240{\n" + "> > - \302\240 \302\240 \302\240 u32 clear, set;\n" + "> > \302\240 \302\240 \302\240 \302\240u64 clocks;\n" + "> > \302\240 \302\240 \302\240 \302\240u32 prescale;\n" + "> > - \302\240 \302\240 \302\240 unsigned long flags;\n" "> > -\n" - "> > - =A0 =A0 =A0 clear =3D MPC52xx_GPT_MODE_MS_MASK | MPC52xx_GPT_MODE_CON=\n" - "TINUOUS;\n" - "> > - =A0 =A0 =A0 set =3D MPC52xx_GPT_MODE_MS_GPIO | MPC52xx_GPT_MODE_COUNT=\n" - "ER_ENABLE;\n" - "> > - =A0 =A0 =A0 if (continuous)\n" - "> > - =A0 =A0 =A0 =A0 =A0 =A0 =A0 set |=3D MPC52xx_GPT_MODE_CONTINUOUS;\n" + "> > - \302\240 \302\240 \302\240 clear = MPC52xx_GPT_MODE_MS_MASK | MPC52xx_GPT_MODE_CONTINUOUS;\n" + "> > - \302\240 \302\240 \302\240 set = MPC52xx_GPT_MODE_MS_GPIO | MPC52xx_GPT_MODE_COUNTER_ENABLE;\n" + "> > - \302\240 \302\240 \302\240 if (continuous)\n" + "> > - \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 set |= MPC52xx_GPT_MODE_CONTINUOUS;\n" "> >\n" - "> > =A0 =A0 =A0 =A0/* Determine the number of clocks in the requested perio=\n" - "d. =A064 bit\n" - "> > =A0 =A0 =A0 =A0 * arithmatic is done here to preserve the precision unt=\n" - "il the\n" + "> > \302\240 \302\240 \302\240 \302\240/* Determine the number of clocks in the requested period. \302\24064 bit\n" + "> > \302\240 \302\240 \302\240 \302\240 * arithmatic is done here to preserve the precision until the\n" "> value\n" - "> > - =A0 =A0 =A0 =A0* is scaled back down into the u32 range. =A0Period is=\n" - " in 'ns',\n" + "> > - \302\240 \302\240 \302\240 \302\240* is scaled back down into the u32 range. \302\240Period is in 'ns',\n" "> bus\n" - "> > - =A0 =A0 =A0 =A0* frequency is in Hz. */\n" - "> > - =A0 =A0 =A0 clocks =3D (u64)period * (u64)gpt->ipb_freq;\n" - "> > - =A0 =A0 =A0 do_div(clocks, 1000000000); /* Scale it down to ns range =\n" - "*/\n" - "> > + =A0 =A0 =A0 =A0* is scaled back down into the u32 range. */\n" - "> > + =A0 =A0 =A0 clocks =3D period * ipb_freq;\n" - "> > + =A0 =A0 =A0 do_div(clocks, NS_PER_SEC); =A0 =A0 =A0 =A0 /* Scale it d=\n" - "own to ns range\n" + "> > - \302\240 \302\240 \302\240 \302\240* frequency is in Hz. */\n" + "> > - \302\240 \302\240 \302\240 clocks = (u64)period * (u64)gpt->ipb_freq;\n" + "> > - \302\240 \302\240 \302\240 do_div(clocks, 1000000000); /* Scale it down to ns range */\n" + "> > + \302\240 \302\240 \302\240 \302\240* is scaled back down into the u32 range. */\n" + "> > + \302\240 \302\240 \302\240 clocks = period * ipb_freq;\n" + "> > + \302\240 \302\240 \302\240 do_div(clocks, NS_PER_SEC); \302\240 \302\240 \302\240 \302\240 /* Scale it down to ns range\n" "> */\n" - ">=20\n" + "> \n" "> Nit: I wouldn't bother with the NS_PER_SEC macro personally. ns per s\n" "> is such a fundamental property that I'd rather see the actual number.\n" "\n" "O.k.\n" "\n" - ">=20\n" + "> \n" "> >\n" - "> > - =A0 =A0 =A0 /* This device cannot handle a clock count greater than 3=\n" - "2 bits\n" + "> > - \302\240 \302\240 \302\240 /* This device cannot handle a clock count greater than 32 bits\n" "> */\n" - "> > - =A0 =A0 =A0 if (clocks > 0xffffffff)\n" - "> > + =A0 =A0 =A0 /* the maximum count is 0x10000 pre-scaler * 0xffff count=\n" - " */\n" - "> > + =A0 =A0 =A0 if (clocks > 0xffff0000)\n" - "> > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0return -EINVAL;\n" - ">=20\n" + "> > - \302\240 \302\240 \302\240 if (clocks > 0xffffffff)\n" + "> > + \302\240 \302\240 \302\240 /* the maximum count is 0x10000 pre-scaler * 0xffff count */\n" + "> > + \302\240 \302\240 \302\240 if (clocks > 0xffff0000)\n" + "> > \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240return -EINVAL;\n" + "> \n" "> This a bug fix? Separate patch please.\n" "\n" - "Ooops, nope. That's wrong. Will remove it. The only *real* bug fix is th=\n" - "e fact that the period must be a 64-bit as the timer can serve longer perio=\n" - "ds than 2.1 seconds (int limit). I will provide a separate fix for that.\n" + "Ooops, nope. That's wrong. Will remove it. The only *real* bug fix is the fact that the period must be a 64-bit as the timer can serve longer periods than 2.1 seconds (int limit). I will provide a separate fix for that.\n" "\n" - ">=20\n" - "> > =A0 =A0 =A0 =A0/* Calculate the prescaler and count values from the clo=\n" - "cks value.\n" - "> > @@ -427,9 +431,47 @@ int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_pri=\n" - "v\n" + "> \n" + "> > \302\240 \302\240 \302\240 \302\240/* Calculate the prescaler and count values from the clocks value.\n" + "> > @@ -427,9 +431,47 @@ int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv\n" "> *gpt, int period,\n" - "> > =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0return -EINVAL;\n" - "> > =A0 =A0 =A0 =A0}\n" + "> > \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240return -EINVAL;\n" + "> > \302\240 \302\240 \302\240 \302\240}\n" "> >\n" - "> > + =A0 =A0 =A0 *reg_val =3D (prescale & 0xffff) << 16 | clocks;\n" - "> > + =A0 =A0 =A0 return 0;\n" + "> > + \302\240 \302\240 \302\240 *reg_val = (prescale & 0xffff) << 16 | clocks;\n" + "> > + \302\240 \302\240 \302\240 return 0;\n" "> > +}\n" "> > +\n" "> > +/**\n" @@ -216,33 +192,30 @@ "> > + * An interrupt will be generated every time the timer fires\n" "> > + */\n" "> > +int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, u64 period,\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 int continuous)\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 int continuous)\n" "> > +{\n" - "> > + =A0 =A0 =A0 u32 clear, set;\n" - "> > + =A0 =A0 =A0 u32 counter_reg;\n" - "> > + =A0 =A0 =A0 unsigned long flags;\n" + "> > + \302\240 \302\240 \302\240 u32 clear, set;\n" + "> > + \302\240 \302\240 \302\240 u32 counter_reg;\n" + "> > + \302\240 \302\240 \302\240 unsigned long flags;\n" "> > +\n" "> > +#if defined(HAVE_MPC5200_WDT)\n" - "> > + =A0 =A0 =A0 /* reject the operation if the timer is used as watchdog =\n" - "(gpt 0\n" + "> > + \302\240 \302\240 \302\240 /* reject the operation if the timer is used as watchdog (gpt 0\n" "> only) */\n" - "> > + =A0 =A0 =A0 spin_lock_irqsave(&gpt->lock, flags);\n" - "> > + =A0 =A0 =A0 if ((gpt->wdt_mode & MPC52xx_GPT_IS_WDT)) {\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 spin_unlock_irqrestore(&gpt->lock, flags)=\n" - ";\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 return -EBUSY;\n" - "> > + =A0 =A0 =A0 }\n" - "> > + =A0 =A0 =A0 spin_unlock_irqrestore(&gpt->lock, flags);\n" + "> > + \302\240 \302\240 \302\240 spin_lock_irqsave(&gpt->lock, flags);\n" + "> > + \302\240 \302\240 \302\240 if ((gpt->wdt_mode & MPC52xx_GPT_IS_WDT)) {\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 spin_unlock_irqrestore(&gpt->lock, flags);\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 return -EBUSY;\n" + "> > + \302\240 \302\240 \302\240 }\n" + "> > + \302\240 \302\240 \302\240 spin_unlock_irqrestore(&gpt->lock, flags);\n" "> > +#endif\n" - ">=20\n" + "> \n" "> I think the behaviour needs to be consistent, regardless of\n" "> HAVE_MPC5200_WDT state. If the IS_WDT flag is set, then this needs\n" "> to bail, even if WDT support is not enabled.\n" "\n" - "O.k., will do. It's a no-op if WDT support isn't enabled (i.e. IS_WDT is =\n" - "never set then), though, see below.\n" + "O.k., will do. It's a no-op if WDT support isn't enabled (i.e. IS_WDT is never set then), though, see below.\n" "\n" - ">=20\n" + "> \n" "> Also, move this code block down into the spin lock/unlock block lower\n" "> in the function. it doesn't make much sense to grab the spin lock\n" "> twice in the same function, and the worst think that can happen if\n" @@ -251,33 +224,28 @@ "\n" "Ouch. Yes, that's a source for races!\n" "\n" - ">=20\n" + "> \n" "> > +\n" - "> > + =A0 =A0 =A0 clear =3D MPC52xx_GPT_MODE_MS_MASK | MPC52xx_GPT_MODE_CON=\n" - "TINUOUS;\n" - "> > + =A0 =A0 =A0 set =3D MPC52xx_GPT_MODE_MS_GPIO | MPC52xx_GPT_MODE_COUNT=\n" - "ER_ENABLE;\n" - "> > + =A0 =A0 =A0 if (continuous)\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 set |=3D MPC52xx_GPT_MODE_CONTINUOUS;\n" + "> > + \302\240 \302\240 \302\240 clear = MPC52xx_GPT_MODE_MS_MASK | MPC52xx_GPT_MODE_CONTINUOUS;\n" + "> > + \302\240 \302\240 \302\240 set = MPC52xx_GPT_MODE_MS_GPIO | MPC52xx_GPT_MODE_COUNTER_ENABLE;\n" + "> > + \302\240 \302\240 \302\240 if (continuous)\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 set |= MPC52xx_GPT_MODE_CONTINUOUS;\n" "> > +\n" - "> > + =A0 =A0 =A0 if (mpc52xx_gpt_calc_counter_input(period, (u64)gpt->ipb_=\n" - "freq,\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =\n" - "=A0 =A0 =A0 =A0&counter_reg) !=3D 0)\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 return -EINVAL;\n" + "> > + \302\240 \302\240 \302\240 if (mpc52xx_gpt_calc_counter_input(period, (u64)gpt->ipb_freq,\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240&counter_reg) != 0)\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 return -EINVAL;\n" "> > +\n" - "> > =A0 =A0 =A0 =A0/* Set and enable the timer */\n" - "> > =A0 =A0 =A0 =A0spin_lock_irqsave(&gpt->lock, flags);\n" - "> > - =A0 =A0 =A0 out_be32(&gpt->regs->count, prescale << 16 | clocks);\n" - "> > + =A0 =A0 =A0 out_be32(&gpt->regs->count, counter_reg);\n" - "> > =A0 =A0 =A0 =A0clrsetbits_be32(&gpt->regs->mode, clear, set);\n" - "> > =A0 =A0 =A0 =A0spin_unlock_irqrestore(&gpt->lock, flags);\n" + "> > \302\240 \302\240 \302\240 \302\240/* Set and enable the timer */\n" + "> > \302\240 \302\240 \302\240 \302\240spin_lock_irqsave(&gpt->lock, flags);\n" + "> > - \302\240 \302\240 \302\240 out_be32(&gpt->regs->count, prescale << 16 | clocks);\n" + "> > + \302\240 \302\240 \302\240 out_be32(&gpt->regs->count, counter_reg);\n" + "> > \302\240 \302\240 \302\240 \302\240clrsetbits_be32(&gpt->regs->mode, clear, set);\n" + "> > \302\240 \302\240 \302\240 \302\240spin_unlock_irqrestore(&gpt->lock, flags);\n" "> >\n" - "> > @@ -437,12 +479,175 @@ int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_p=\n" - "riv\n" + "> > @@ -437,12 +479,175 @@ int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv\n" "> *gpt, int period,\n" - "> > =A0}\n" - "> > =A0EXPORT_SYMBOL(mpc52xx_gpt_start_timer);\n" + "> > \302\240}\n" + "> > \302\240EXPORT_SYMBOL(mpc52xx_gpt_start_timer);\n" "> >\n" "> > -void mpc52xx_gpt_stop_timer(struct mpc52xx_gpt_priv *gpt)\n" "> > +/**\n" @@ -286,71 +254,68 @@ "> > + */\n" "> > +u64 mpc52xx_gpt_timer_period(struct mpc52xx_gpt_priv *gpt)\n" "> > +{\n" - "> > + =A0 =A0 =A0 u64 period;\n" - "> > + =A0 =A0 =A0 u32 prescale;\n" - "> > + =A0 =A0 =A0 unsigned long flags;\n" + "> > + \302\240 \302\240 \302\240 u64 period;\n" + "> > + \302\240 \302\240 \302\240 u32 prescale;\n" + "> > + \302\240 \302\240 \302\240 unsigned long flags;\n" "> > +\n" - "> > + =A0 =A0 =A0 spin_lock_irqsave(&gpt->lock, flags);\n" - "> > + =A0 =A0 =A0 period =3D in_be32(&gpt->regs->count);\n" - "> > + =A0 =A0 =A0 spin_unlock_irqrestore(&gpt->lock, flags);\n" + "> > + \302\240 \302\240 \302\240 spin_lock_irqsave(&gpt->lock, flags);\n" + "> > + \302\240 \302\240 \302\240 period = in_be32(&gpt->regs->count);\n" + "> > + \302\240 \302\240 \302\240 spin_unlock_irqrestore(&gpt->lock, flags);\n" "> > +\n" - "> > + =A0 =A0 =A0 prescale =3D period >> 16;\n" - "> > + =A0 =A0 =A0 period &=3D 0xffff;\n" - "> > + =A0 =A0 =A0 if (prescale =3D=3D 0)\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 prescale =3D 0x10000;\n" - "> > + =A0 =A0 =A0 period =3D period * (u64) prescale * NS_PER_SEC;\n" - "> > + =A0 =A0 =A0 do_div(period, (u64)gpt->ipb_freq);\n" - ">=20\n" + "> > + \302\240 \302\240 \302\240 prescale = period >> 16;\n" + "> > + \302\240 \302\240 \302\240 period &= 0xffff;\n" + "> > + \302\240 \302\240 \302\240 if (prescale == 0)\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 prescale = 0x10000;\n" + "> > + \302\240 \302\240 \302\240 period = period * (u64) prescale * NS_PER_SEC;\n" + "> > + \302\240 \302\240 \302\240 do_div(period, (u64)gpt->ipb_freq);\n" + "> \n" "> Are the casts necessary? Maybe prescale should just be a u64 value?\n" "\n" "Good point. Will do that.\n" "\n" - ">=20\n" - "> > + =A0 =A0 =A0 return period;\n" + "> \n" + "> > + \302\240 \302\240 \302\240 return period;\n" "> > +}\n" "> > +EXPORT_SYMBOL(mpc52xx_gpt_timer_period);\n" "> > +\n" "> > +int mpc52xx_gpt_stop_timer(struct mpc52xx_gpt_priv *gpt)\n" - "> > =A0{\n" - "> > + =A0 =A0 =A0 unsigned long flags;\n" + "> > \302\240{\n" + "> > + \302\240 \302\240 \302\240 unsigned long flags;\n" "> > +\n" - "> > + =A0 =A0 =A0 /* reject the operation if the timer is used as watchdog =\n" - "(gpt 0\n" + "> > + \302\240 \302\240 \302\240 /* reject the operation if the timer is used as watchdog (gpt 0\n" "> only) */\n" - "> > + =A0 =A0 =A0 spin_lock_irqsave(&gpt->lock, flags);\n" + "> > + \302\240 \302\240 \302\240 spin_lock_irqsave(&gpt->lock, flags);\n" "> > +#if defined(HAVE_MPC5200_WDT)\n" - "> > + =A0 =A0 =A0 if ((gpt->wdt_mode & MPC52xx_GPT_IS_WDT)) {\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 spin_unlock_irqrestore(&gpt->lock, flags)=\n" - ";\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 return -EBUSY;\n" - "> > + =A0 =A0 =A0 }\n" + "> > + \302\240 \302\240 \302\240 if ((gpt->wdt_mode & MPC52xx_GPT_IS_WDT)) {\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 spin_unlock_irqrestore(&gpt->lock, flags);\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 return -EBUSY;\n" + "> > + \302\240 \302\240 \302\240 }\n" "> > +#endif\n" - ">=20\n" + "> \n" "> Again, drop the #if/endif wrapper.\n" - ">=20\n" + "> \n" "> > +/**\n" "> > + * mpc52xx_gpt_wdt_release - Release the watchdog so it can be used as\n" "> gpt\n" "> > + * @gpt_wdt: the watchdog gpt\n" "> > + *\n" - "> > + * Note: Stops the watchdog if CONFIG_WATCHDOG_NOWAYOUT is not defined=\n" - ".\n" + "> > + * Note: Stops the watchdog if CONFIG_WATCHDOG_NOWAYOUT is not defined.\n" "> > + * the function does not protect itself form being called without a\n" "> > + * timer or with a timer which cannot function as wdt.\n" "> > + */\n" "> > +int mpc52xx_gpt_wdt_release(struct mpc52xx_gpt_priv *gpt_wdt)\n" "> > +{\n" "> > +#if !defined(CONFIG_WATCHDOG_NOWAYOUT)\n" - "> > + =A0 =A0 =A0 unsigned long flags;\n" + "> > + \302\240 \302\240 \302\240 unsigned long flags;\n" "> > +\n" - "> > + =A0 =A0 =A0 spin_lock_irqsave(&gpt_wdt->lock, flags);\n" - "> > + =A0 =A0 =A0 clrbits32(&gpt_wdt->regs->mode,\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 MPC52xx_GPT_MODE_COUNTER_ENABLE |\n" + "> > + \302\240 \302\240 \302\240 spin_lock_irqsave(&gpt_wdt->lock, flags);\n" + "> > + \302\240 \302\240 \302\240 clrbits32(&gpt_wdt->regs->mode,\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 MPC52xx_GPT_MODE_COUNTER_ENABLE |\n" "> MPC52xx_GPT_MODE_WDT_EN);\n" - "> > + =A0 =A0 =A0 gpt_wdt->wdt_mode &=3D ~MPC52xx_GPT_IS_WDT;\n" - "> > + =A0 =A0 =A0 spin_unlock_irqrestore(&gpt_wdt->lock, flags);\n" + "> > + \302\240 \302\240 \302\240 gpt_wdt->wdt_mode &= ~MPC52xx_GPT_IS_WDT;\n" + "> > + \302\240 \302\240 \302\240 spin_unlock_irqrestore(&gpt_wdt->lock, flags);\n" "> > +#endif\n" - "> > + =A0 =A0 =A0 return 0;\n" + "> > + \302\240 \302\240 \302\240 return 0;\n" "> > +}\n" "> > +EXPORT_SYMBOL(mpc52xx_gpt_wdt_release);\n" "> > +\n" @@ -359,89 +324,73 @@ "> > + * mpc52xx_gpt_wdt_stop - Stop the watchdog\n" "> > + * @gpt_wdt: the watchdog gpt\n" "> > + *\n" - "> > + * Note: the function does not protect itself form being called withou=\n" - "t\n" + "> > + * Note: the function does not protect itself form being called without\n" "> a\n" "> > + * timer or with a timer which cannot function as wdt.\n" "> > + */\n" "> > +int mpc52xx_gpt_wdt_stop(struct mpc52xx_gpt_priv *gpt_wdt)\n" "> > +{\n" - "> > + =A0 =A0 =A0 unsigned long flags;\n" + "> > + \302\240 \302\240 \302\240 unsigned long flags;\n" "> > +\n" - "> > + =A0 =A0 =A0 spin_lock_irqsave(&gpt_wdt->lock, flags);\n" - "> > + =A0 =A0 =A0 clrbits32(&gpt_wdt->regs->mode,\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 MPC52xx_GPT_MODE_COUNTER_ENABLE |\n" + "> > + \302\240 \302\240 \302\240 spin_lock_irqsave(&gpt_wdt->lock, flags);\n" + "> > + \302\240 \302\240 \302\240 clrbits32(&gpt_wdt->regs->mode,\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 MPC52xx_GPT_MODE_COUNTER_ENABLE |\n" "> MPC52xx_GPT_MODE_WDT_EN);\n" - "> > + =A0 =A0 =A0 gpt_wdt->wdt_mode &=3D ~MPC52xx_GPT_IS_WDT;\n" - "> > + =A0 =A0 =A0 spin_unlock_irqrestore(&gpt_wdt->lock, flags);\n" - "> > + =A0 =A0 =A0 return 0;\n" + "> > + \302\240 \302\240 \302\240 gpt_wdt->wdt_mode &= ~MPC52xx_GPT_IS_WDT;\n" + "> > + \302\240 \302\240 \302\240 spin_unlock_irqrestore(&gpt_wdt->lock, flags);\n" + "> > + \302\240 \302\240 \302\240 return 0;\n" "> > +}\n" "> > +EXPORT_SYMBOL(mpc52xx_gpt_wdt_stop);\n" - "> > +#endif =A0/* =A0CONFIG_WATCHDOG_NOWAYOUT =A0*/\n" - "> > +#endif =A0/* =A0HAVE_MPC5200_WDT =A0*/\n" + "> > +#endif \302\240/* \302\240CONFIG_WATCHDOG_NOWAYOUT \302\240*/\n" + "> > +#endif \302\240/* \302\240HAVE_MPC5200_WDT \302\240*/\n" "> > +\n" - "> > =A0/* -----------------------------------------------------------------=\n" - "----\n" - "> > =A0* of_platform bus binding code\n" - "> > =A0*/\n" + "> > \302\240/* ---------------------------------------------------------------------\n" + "> > \302\240* of_platform bus binding code\n" + "> > \302\240*/\n" "> > @@ -473,6 +678,30 @@ static int __devinit mpc52xx_gpt_probe(struct\n" "> of_device *ofdev,\n" - "> > =A0 =A0 =A0 =A0list_add(&gpt->list, &mpc52xx_gpt_list);\n" - "> > =A0 =A0 =A0 =A0mutex_unlock(&mpc52xx_gpt_list_mutex);\n" + "> > \302\240 \302\240 \302\240 \302\240list_add(&gpt->list, &mpc52xx_gpt_list);\n" + "> > \302\240 \302\240 \302\240 \302\240mutex_unlock(&mpc52xx_gpt_list_mutex);\n" "> >\n" "> > +#if defined(HAVE_MPC5200_WDT)\n" - "> > + =A0 =A0 =A0 /* check if this device could be a watchdog */\n" - "> > + =A0 =A0 =A0 if (of_get_property(ofdev->node, \"fsl,has-wdt\", NULL) ||\n" - "> > + =A0 =A0 =A0 =A0 =A0 of_get_property(ofdev->node, \"has-wdt\", NULL)) {\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 const u32 *on_boot_wdt;\n" + "> > + \302\240 \302\240 \302\240 /* check if this device could be a watchdog */\n" + "> > + \302\240 \302\240 \302\240 if (of_get_property(ofdev->node, \"fsl,has-wdt\", NULL) ||\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 of_get_property(ofdev->node, \"has-wdt\", NULL)) {\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 const u32 *on_boot_wdt;\n" "> > +\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 gpt->wdt_mode =3D MPC52xx_GPT_CAN_WDT;\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 gpt->wdt_mode = MPC52xx_GPT_CAN_WDT;\n" "> > +\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* check if the device shall be used as o=\n" - "n-boot watchdog\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 /* check if the device shall be used as on-boot watchdog\n" "> */\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 on_boot_wdt =3D of_get_property(ofdev->no=\n" - "de, \"wdt,on-boot\",\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 on_boot_wdt = of_get_property(ofdev->node, \"wdt,on-boot\",\n" "> NULL);\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (on_boot_wdt) {\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 gpt->wdt_mode |=3D MPC52x=\n" - "x_GPT_IS_WDT;\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (*on_boot_wdt > 0 &&\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 mpc52xx_gpt_wdt_s=\n" - "tart(gpt, *on_boot_wdt) =3D=3D\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 if (on_boot_wdt) {\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 gpt->wdt_mode |= MPC52xx_GPT_IS_WDT;\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 if (*on_boot_wdt > 0 &&\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 mpc52xx_gpt_wdt_start(gpt, *on_boot_wdt) ==\n" "> 0)\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_info(=\n" - "gpt->dev,\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =\n" - "=A0 =A0 =A0\"running as wdt, timeout %us\\n\",\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =\n" - "=A0 =A0 =A0*on_boot_wdt);\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 else\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_info(=\n" - "gpt->dev, \"reserved as wdt\\n\");\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 } else\n" - "> > + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_info(gpt->dev, \"can f=\n" - "unction as wdt\\n\");\n" - "> > + =A0 =A0 =A0 }\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 dev_info(gpt->dev,\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240\"running as wdt, timeout %us\\n\",\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240*on_boot_wdt);\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 else\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 dev_info(gpt->dev, \"reserved as wdt\\n\");\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 } else\n" + "> > + \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 \302\240 dev_info(gpt->dev, \"can function as wdt\\n\");\n" + "> > + \302\240 \302\240 \302\240 }\n" "> > +#endif\n" - ">=20\n" + "> \n" "> Ditto on the #if/endif\n" "\n" "I don't think it can be removed here. Think about the following:\n" "- user has a dtb with fsl,has-wdt and fsl,wdt-on-boot properties and\n" "- disables 5200 WDT in the kernel config.\n" "\n" - "Now the system refuses to use GPT0 as GPT, although the WDT functionality h=\n" - "as been disabled. Of course, the dts doesn't fit the kernel config now, bu=\n" - "t I think we should catch this case.\n" + "Now the system refuses to use GPT0 as GPT, although the WDT functionality has been disabled. Of course, the dts doesn't fit the kernel config now, but I think we should catch this case.\n" "\n" - "Actually I tried to implement your requirements from <http://lists.ozlabs.o=\n" - "rg/pipermail/linuxppc-dev/2009-August/074595.html>:\n" + "Actually I tried to implement your requirements from <http://lists.ozlabs.org/pipermail/linuxppc-dev/2009-August/074595.html>:\n" "- fsl,has-wdt indicates that the GPT can serve as WDT;\n" - "- any access through the wdt api to a wdt-capable gpt actually reserves it =\n" - "as wdt;\n" - "- the new of property forces reserving the wdt before any gpt api function =\n" - "has chance to grab it as gpt.\n" + "- any access through the wdt api to a wdt-capable gpt actually reserves it as wdt;\n" + "- the new of property forces reserving the wdt before any gpt api function has chance to grab it as gpt.\n" "\n" "Or did I get something wrong here?\n" "\n" @@ -449,8 +398,7 @@ "Albrecht.\n" "\n" "Jetzt NEU: Do it youself E-Cards bei Arcor.de!\n" - "Stellen Sie Ihr eigenes Unikat zusammen und machen Sie dem Empf=E4nger eine=\n" - " ganz pers=F6nliche Freude!\n" + "Stellen Sie Ihr eigenes Unikat zusammen und machen Sie dem Empf\303\244nger eine ganz pers\303\266nliche Freude!\n" E-Card Marke Eigenbau: HIER KLICKEN: http://www.arcor.de/rd/footer.ecard -1b5546515599103db3fa97d80b2937eb0d87b980582ffd59eae6233f88a8e179 +99a50896a95d9fc219f271f7cda6a12ea04f78cedad7d27895f98025de5e126b
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