From mboxrd@z Thu Jan 1 00:00:00 1970 From: Michael Neuling Date: Wed, 30 Apr 2014 05:51:14 +0000 Subject: Re: [PATCH 2/6] KVM: PPC: Book3S PR: Emulate TIR register Message-Id: <19971.1398837074@ale.ozlabs.ibm.com> List-Id: References: <1398788262-3307-1-git-send-email-agraf@suse.de> <1398788262-3307-3-git-send-email-agraf@suse.de> In-Reply-To: <1398788262-3307-3-git-send-email-agraf@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Alexander Graf Cc: kvm-ppc@vger.kernel.org, kvm@vger.kernel.org > In parallel to the Processor ID Register (PIR) threaded POWER8 also adds a > Thread ID Register (TID). Since PR KVM doesn't emulate more than one thread s/TID/TIR/ above > per core, we can just always expose 0 here. I'm not sure if we ever do, but if we IPI ourselves using a doorbell, we'll need to emulate the doorbell as well. Mikey > Signed-off-by: Alexander Graf > --- > arch/powerpc/kvm/book3s_emulate.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/powerpc/kvm/book3s_emulate.c b/arch/powerpc/kvm/book3s_emulate.c > index 914beb2..e4e54fb 100644 > --- a/arch/powerpc/kvm/book3s_emulate.c > +++ b/arch/powerpc/kvm/book3s_emulate.c > @@ -563,6 +563,7 @@ int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val > case SPRN_MMCR0: > case SPRN_MMCR1: > case SPRN_MMCR2: > + case SPRN_TIR: > *spr_val = 0; > break; > default: > -- > 1.8.1.4 > > -- > To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Michael Neuling Subject: Re: [PATCH 2/6] KVM: PPC: Book3S PR: Emulate TIR register Date: Wed, 30 Apr 2014 15:51:14 +1000 Message-ID: <19971.1398837074@ale.ozlabs.ibm.com> References: <1398788262-3307-1-git-send-email-agraf@suse.de> <1398788262-3307-3-git-send-email-agraf@suse.de> Cc: kvm-ppc@vger.kernel.org, kvm@vger.kernel.org To: Alexander Graf Return-path: In-reply-to: <1398788262-3307-3-git-send-email-agraf@suse.de> Sender: kvm-ppc-owner@vger.kernel.org List-Id: kvm.vger.kernel.org > In parallel to the Processor ID Register (PIR) threaded POWER8 also adds a > Thread ID Register (TID). Since PR KVM doesn't emulate more than one thread s/TID/TIR/ above > per core, we can just always expose 0 here. I'm not sure if we ever do, but if we IPI ourselves using a doorbell, we'll need to emulate the doorbell as well. Mikey > Signed-off-by: Alexander Graf > --- > arch/powerpc/kvm/book3s_emulate.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/powerpc/kvm/book3s_emulate.c b/arch/powerpc/kvm/book3s_emulate.c > index 914beb2..e4e54fb 100644 > --- a/arch/powerpc/kvm/book3s_emulate.c > +++ b/arch/powerpc/kvm/book3s_emulate.c > @@ -563,6 +563,7 @@ int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val > case SPRN_MMCR0: > case SPRN_MMCR1: > case SPRN_MMCR2: > + case SPRN_TIR: > *spr_val = 0; > break; > default: > -- > 1.8.1.4 > > -- > To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html >