[PATCH 0/5] qemu-arm64: Allow booting via Trusted Firmware

["André Przywara" <andre.przywara@arm.com>]

On 24/09/2020 09:44, Heinrich Schuchardt wrote:
> On 24.09.20 09:57, Amit Tomar wrote:
>> Hi,
>>
>> Andre Przywara (5):
>>
>>     ? arm64: PIE: Skip fixups if distance is zero
>>     ? arm64: PIE: Allow fixed stack pointer
>>     ? qemu-arm: Remove need to specify flash banks
>>     ? qemu: Drop ARCH_SUPPORT_TFABOOT
>>     ? qemu/arm64: Enable POSITION_INDEPENDENT
>>
>>     ?arch/arm/Kconfig? ? ? ? ? ? ?| 4 ++--
>>     ?arch/arm/cpu/armv8/start.S? ?| 3 ++-
>>     ?configs/qemu_arm64_defconfig | 1 +
>>     ?include/configs/qemu-arm.h? ?| 8 +-------
>>     ?4 files changed, 6 insertions(+), 10 deletions(-)
>>
>>     --
>>     2.17.5
>>
>>
>> I tried testing this series but don't see any output while loading
>> U-Boot from ROM:
>>
>> # ./qemu-system-aarch64 -M virt -cpu cortex-a57 -nographic -smp 1 -bios
>> u-boot.bin
> 
> TF-A runs at EL3 so you should test with
> -machine virt,secure=true,virtualization=true

This is true, but the point of this series is to work both within TF-A
and without it. So it should work (and does for me!) with Amit's line above.

> The bios parameter has to point to the TF-A bl1.bin binary. see TF-A's
> docs/plat/qemu.rst: BL1 is used as the BootROM, supplied with the -bios
> argument.

Yeah, and it seems to be even more complicated, since you have to glue
fip.bin within a certain offset to bl1.bin, into one file to give to
-bios. I use:
$ cp build/qemu/debug/bl1.bin flash.bin
$ dd if=build/qemu/debug/fip.bin of=flash.bin bs=4k seek=64

... and make sure to give QEMU more than 512MB of RAM, since the default
load address for U-Boot is there. Actually fixing this annoyance was the
main motivation for this series.

Once people agreed that this series is making some sense, I plan to move
the load address in TF-A and improve the documentation in both TF-A and
QEMU on this.

Thanks!
Andre

> 
> U-Boot is BL33.
> 
> Best regards
> 
> Heinrich
> 
>>
>> strangely enough SP is having a value of 0 after execution:
>>
>> (qemu) info registers
>> ?PC=0000000000001a00 X00=540000a0f100303f X01=000000000007c000
>> X02=0000000000000000 X03=00000000401fe000 X04=0000000000000000
>> X05=0000000000000000 X06=0000000000000030 X07=00000000401fe008
>> X08=0000000000000000 X09=14000008d51e115f X10=0000000000000000
>> X11=0000000000000000 X12=0000000000000000 X13=0000000000000000
>> X14=0000000000000000 X15=0000000000000000 X16=0000000000000000
>> X17=0000000000000000 X18=0000000000000000 X19=0000000000000000
>> X20=0000000000000000 X21=0000000000000000 X22=0000000000000000
>> X23=0000000000000000 X24=0000000000000000 X25=0000000000000000
>> X26=0000000000000000 X27=0000000000000000 X28=0000000000000000
>> X29=00000000000000c8 X30=14000008d51e39cb ?SP=0000000000000000
>> PSTATE=000003c5 ---- EL1h ? ? FPCR=00000000 FPSR=00000000
>>
>> Wondering , if I have missed something ?
>>
>> Thanks
>> -Amit
>