From: Jani Nikula <jani.nikula@linux.intel.com>
To: Juasheem Sultan <jdsultan@google.com>,
intel-gfx@lists.freedesktop.org, intel_xe@lists.freedesktop.org
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>,
Manasi Navare <navaremanasi@google.com>,
Drew Davenport <ddavenport@google.com>,
Sean Paul <seanpaul@google.com>,
Samuel Jacob <samjaco@google.com>,
Rajat Jain <rajatja@google.com>,
Juasheem Sultan <jdsultan@google.com>
Subject: Re: [RFC PATCH v3 2/2] drm/i915/display: Synchronize crtc_state for initial commit
Date: Thu, 22 Jan 2026 17:29:46 +0200 [thread overview]
Message-ID: <19ddb0a9aa900c51759cfa62b66bcbf079c4dde8@intel.com> (raw)
In-Reply-To: <20260121204705.432290-3-jdsultan@google.com>
On Wed, 21 Jan 2026, Juasheem Sultan <jdsultan@google.com> wrote:
> When attempting the initial commit, there is a mismatch between
> the new crtc_state and the old crtc_state. This causes us to fail the
> pipe_config comparison and force a modeset. In the case where we are
> inheriting an initialized state, we can sync the new and the old state
> to pass the comparison and allow us to do a fastset and achieve an
> uninterrupted handoff to userspace.
>
> Signed-off-by: Juasheem Sultan <jdsultan@google.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 0d527cf22866..6eef4bd2e251 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5736,6 +5736,25 @@ static void intel_crtc_check_fastset(const struct intel_crtc_state *old_crtc_sta
> if (old_crtc_state->vrr.in_range != new_crtc_state->vrr.in_range)
> new_crtc_state->update_lrr = false;
>
> + /* Copying crtc state if inheriting an old state for commit */
> + if (old_crtc_state->inherited) {
> + new_crtc_state->hw = old_crtc_state->hw;
> +
> + new_crtc_state->port_clock = old_crtc_state->port_clock;
> + new_crtc_state->pipe_bpp = old_crtc_state->pipe_bpp;
> + new_crtc_state->cpu_transcoder = old_crtc_state->cpu_transcoder;
> + new_crtc_state->lane_count = old_crtc_state->lane_count;
> + new_crtc_state->output_types = old_crtc_state->output_types;
> + new_crtc_state->dp_m_n = old_crtc_state->dp_m_n;
> + new_crtc_state->framestart_delay = old_crtc_state->framestart_delay;
> + new_crtc_state->pixel_multiplier = old_crtc_state->pixel_multiplier;
> + new_crtc_state->pixel_rate = old_crtc_state->pixel_rate;
> + new_crtc_state->enhanced_framing = old_crtc_state->enhanced_framing;
> + new_crtc_state->dpll_hw_state = old_crtc_state->dpll_hw_state;
> + new_crtc_state->intel_dpll = old_crtc_state->intel_dpll;
> + new_crtc_state->vrr.guardband = old_crtc_state->vrr.guardband;
I'd like to see logs of what the differences are.
BR,
Jani.
> + }
> +
> if (!intel_pipe_config_compare(old_crtc_state, new_crtc_state, true)) {
> drm_dbg_kms(display->drm, "[CRTC:%d:%s] fastset requirement not met, forcing full modeset\n",
> crtc->base.base.id, crtc->base.name);
--
Jani Nikula, Intel
next prev parent reply other threads:[~2026-01-22 15:29 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-21 20:46 [RFC PATCH v3 0/2] Enable seamless boot (fastboot) for PTL Juasheem Sultan
2026-01-21 20:46 ` [RFC PATCH v3 1/2] drm/xe/display: Fix reading the framebuffer from stolen memory Juasheem Sultan
2026-01-21 20:46 ` [RFC PATCH v3 2/2] drm/i915/display: Synchronize crtc_state for initial commit Juasheem Sultan
2026-01-21 22:02 ` Manasi Navare
2026-01-22 15:29 ` Jani Nikula [this message]
2026-01-27 8:05 ` Juasheem Sultan
2026-02-03 18:18 ` Manasi Navare
2026-02-03 19:47 ` Jani Nikula
2026-02-03 21:03 ` Manasi Navare
2026-03-03 0:43 ` Manasi Navare
2026-03-03 9:44 ` Jani Nikula
2026-03-04 3:30 ` Juasheem Sultan
2026-01-21 21:29 ` ✗ Fi.CI.BUILD: failure for Enable seamless boot (fastboot) for PTL Patchwork
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