From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: Intel i915 freeze on latest git Date: Wed, 02 Feb 2011 09:59:54 +0000 Message-ID: <1bdc18$jfb1or@fmsmga002.fm.intel.com> References: <20110201112200.GA2349@fujiko> <1bdc18$jeuv05@fmsmga002.fm.intel.com> <20110201122943.GA2011@fujiko> <20110201140754.GA2229@fujiko> <20110201083112.3cfefc3a@jbarnes-desktop> <20110202095656.GA2202@fujiko> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 56D6F9E7AE for ; Wed, 2 Feb 2011 02:00:02 -0800 (PST) In-Reply-To: <20110202095656.GA2202@fujiko> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org Errors-To: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org To: Francesco Allertsen Cc: dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org On Wed, 2 Feb 2011 10:56:57 +0100, Francesco Allertsen wrote: > On Tue, Feb 01, 2011 at 04:57:37PM +0000, Chris Wilson wrote: > > So, if this is the issue, then simply commenting out the tweaking of > > RSTDBYCTL in ironlake_enable_rc6() should prevent the hang. > > I've tried the following patch > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index d7f237d..7769768 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -6527,7 +6527,6 @@ void ironlake_enable_rc6(struct drm_device *dev) > ADVANCE_LP_RING(); > > I915_WRITE(PWRCTXA, dev_priv->pwrctx->gtt_offset | PWRCTX_EN); > - I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) & ~RCX_SW_EXIT); > } > > /* Set up chip specific display functions */ > > And it still hangs. Hmm, that was the only change I could spot between the two patches. Care to disable that function and see what happens? [i.e. put a return before we write anything to the ring] -Chris -- Chris Wilson, Intel Open Source Technology Centre