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From: Mahesh Kumar <mahesh1.kumar@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org, paulo.r.zanoni@intel.com,
	maarten.lankhorst@intel.com
Subject: Re: [PATCH v3 1/2] drm/i915/skl+: Check for supported plane configuration in Interlace mode
Date: Sat, 1 Jul 2017 09:35:12 +0530	[thread overview]
Message-ID: <1c18e172-e5ed-e51d-f913-4fe1dd67a8a0@intel.com> (raw)
In-Reply-To: <20170630122604.GV12629@intel.com>

Hi,


On Friday 30 June 2017 05:56 PM, Ville Syrjälä wrote:
> On Fri, Jun 30, 2017 at 05:40:59PM +0530, Mahesh Kumar wrote:
>> In Gen9 platform Interlaced fetch mode doesn't support following plane
>> configuration:
>>   - Y/Yf tiling
>>   - 90/270 rotation
> The rotation check seems to be missing from the code?
90/270 rotation require Y/Yf tiling, so that will be automagically 
handled as Y-tile case.

-Mahesh
>
>>   - YUV420 hybrid planar source pixel formats.
>>
>> This patch adds check to fail the flip if any of the above configuration
>> is requested.
>>
>> Changes since V1:
>>   - handle checks in intel_plane_atomic_check_with_state (ville)
>>   - takeout plane scaler checks combile with pipe scaler in next patch
>> Changes since V2:
>>   - No need to check for NV12 as it need scaling, so it will be rejected
>>     by scaling check (ville)
>>
>> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
>> ---
>>   drivers/gpu/drm/i915/intel_atomic_plane.c | 15 +++++++++++++++
>>   1 file changed, 15 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
>> index 4325cb0a04f5..ee76fab7bb6f 100644
>> --- a/drivers/gpu/drm/i915/intel_atomic_plane.c
>> +++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
>> @@ -114,6 +114,8 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
>>   	struct drm_i915_private *dev_priv = to_i915(plane->dev);
>>   	struct drm_plane_state *state = &intel_state->base;
>>   	struct intel_plane *intel_plane = to_intel_plane(plane);
>> +	const struct drm_display_mode *adjusted_mode =
>> +		&crtc_state->base.adjusted_mode;
>>   	int ret;
>>   
>>   	/*
>> @@ -173,6 +175,19 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
>>   	if (ret)
>>   		return ret;
>>   
>> +	/*
>> +	 * Y-tiling is not supported in IF-ID Interlace mode in
>> +	 * GEN9 and above.
>> +	 */
>> +	if (state->fb && INTEL_GEN(dev_priv) >= 9 && crtc_state->base.enable &&
>> +	    adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
>> +		if (state->fb->modifier == I915_FORMAT_MOD_Y_TILED ||
>> +		    state->fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
>> +			DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n");
>> +			return -EINVAL;
>> +		}
>> +	}
>> +
>>   	/* FIXME pre-g4x don't work like this */
>>   	if (intel_state->base.visible)
>>   		crtc_state->active_planes |= BIT(intel_plane->id);
>> -- 
>> 2.13.0

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  reply	other threads:[~2017-07-01  4:01 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-30 12:10 [PATCH v3 0/2] Handle unsupported configuration with IF-ID Mahesh Kumar
2017-06-30 12:10 ` [PATCH v3 1/2] drm/i915/skl+: Check for supported plane configuration in Interlace mode Mahesh Kumar
2017-06-30 12:26   ` Ville Syrjälä
2017-07-01  4:05     ` Mahesh Kumar [this message]
2017-07-03 14:02       ` Ville Syrjälä
2017-07-03 15:58         ` Mahesh Kumar
2017-07-04 14:41           ` Ville Syrjälä
2017-07-05  6:39             ` Mahesh Kumar
2017-07-05 10:13               ` Ville Syrjälä
2017-06-30 12:11 ` [PATCH v3 2/2] drm/i915/skl+: Scaling not supported in IF-ID " Mahesh Kumar
2017-06-30 12:59 ` ✗ Fi.CI.BAT: failure for Handle unsupported configuration with IF-ID (rev3) Patchwork
2017-07-03 16:37 ` ✓ Fi.CI.BAT: success " Patchwork
2017-07-17  7:26 ` [PATCH v3 0/2] Handle unsupported configuration with IF-ID Daniel Vetter
2017-07-18 12:42   ` Mahesh Kumar
2017-07-19  8:22     ` Lankhorst, Maarten
2017-07-19  8:51       ` Daniel Vetter

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