diff for duplicates of <1cc6bbb9559192e40aebc2eaa0e55e1b3219c6b7.camel@mediatek.com> diff --git a/N1/2.bin b/N1/2.bin new file mode 100644 index 0000000..812ffd6 --- /dev/null +++ b/N1/2.bin @@ -0,0 +1,438 @@ +<html><body><p> +<pre> +Hi, Paul: + +On Fri, 2025-01-10 at 20:34 +0800, paul-pl.chen wrote: +> From: "Nancy.Lin" <nancy.lin@mediatek.com> +>  +> OUTPROC handles the post-stage of pixel processing in +> the overlapping procedure.OUTPROC manages pixels for +> gamma correction and ensures that pixel values are +> within the correct range. +>  +> Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> +> Signed-off-by: Paul-pl.Chen <paul-pl.chen@mediatek.com> +> --- +>  drivers/gpu/drm/mediatek/Makefile           |   1 + +>  drivers/gpu/drm/mediatek/mtk_ddp_comp.c     |   1 + +>  drivers/gpu/drm/mediatek/mtk_ddp_comp.h     |   1 + +>  drivers/gpu/drm/mediatek/mtk_disp_drv.h     |  14 ++ +>  drivers/gpu/drm/mediatek/mtk_disp_outproc.c | 244 ++++++++++++++++++++ +>  drivers/gpu/drm/mediatek/mtk_disp_outproc.h |  22 ++ +>  drivers/gpu/drm/mediatek/mtk_drm_drv.c      |   1 + +>  drivers/gpu/drm/mediatek/mtk_drm_drv.h      |   1 + +>  8 files changed, 285 insertions(+) +>  create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_outproc.c +>  create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_outproc.h +>  +> diff --git a/drivers/gpu/drm/mediatek/Makefile b/drivers/gpu/drm/mediatek/Makefile +> index a7b9ebe27f68..9546bc6b7b2e 100644 +> --- a/drivers/gpu/drm/mediatek/Makefile +> +++ b/drivers/gpu/drm/mediatek/Makefile +> @@ -10,6 +10,7 @@ mediatek-drm-y := mtk_crtc.o \ +>    mtk_disp_gamma.o \ +>    mtk_disp_merge.o \ +>    mtk_disp_ovl.o \ +> +  mtk_disp_outproc.o \ +>    mtk_disp_ovl_adaptor.o \ +>    mtk_disp_rdma.o \ +>    mtk_drm_drv.o \ +> diff --git a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c +> index e65c6df987f2..cc780744f060 100644 +> --- a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c +> +++ b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c +> @@ -447,6 +447,7 @@ static const char * const mtk_ddp_comp_stem[MTK_DDP_COMP_TYPE_MAX] = { +>  [MTK_DSI] = "dsi", +>  [MTK_OVL_BLENDER] = "blender", +>  [MTK_OVL_EXDMA] = "exdma", +> +[MTK_OVL_OUTPROC] = "outproc", +>  }; +>   +>  struct mtk_ddp_comp_match { +> diff --git a/drivers/gpu/drm/mediatek/mtk_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_ddp_comp.h +> index 075ba5683f93..b33d3289b8b6 100644 +> --- a/drivers/gpu/drm/mediatek/mtk_ddp_comp.h +> +++ b/drivers/gpu/drm/mediatek/mtk_ddp_comp.h +> @@ -45,6 +45,7 @@ enum mtk_ddp_comp_type { +>  MTK_DSI, +>  MTK_OVL_BLENDER, +>  MTK_OVL_EXDMA, +> +MTK_OVL_OUTPROC, +>  MTK_DDP_COMP_TYPE_MAX, +>  }; +>   +> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h +> index 719191f05b27..44d2cbe919dc 100644 +> --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h +> +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h +> @@ -64,6 +64,20 @@ void mtk_dither_set_common(void __iomem *regs, struct cmdq_client_reg *cmdq_reg, +>     unsigned int bpc, unsigned int cfg, +>     unsigned int dither_en, struct cmdq_pkt *cmdq_pkt); +>   +> +void mtk_disp_outproc_start(struct device *dev); +> +void mtk_disp_outproc_stop(struct device *dev); +> +int mtk_disp_outproc_clk_enable(struct device *dev); +> +void mtk_disp_outproc_clk_disable(struct device *dev); +> +void mtk_disp_outproc_config(struct device *dev, unsigned int w, +> +     unsigned int h, unsigned int vrefresh, +> +     unsigned int bpc, struct cmdq_pkt *cmdq_pkt); +> +void mtk_disp_outproc_register_vblank_cb(struct device *dev, +> + void (*vblank_cb)(void *), +> + void *vblank_cb_data); +> +void mtk_disp_outproc_unregister_vblank_cb(struct device *dev); +> +void mtk_disp_outproc_enable_vblank(struct device *dev); +> +void mtk_disp_outproc_disable_vblank(struct device *dev); +> + +>  void mtk_dpi_start(struct device *dev); +>  void mtk_dpi_stop(struct device *dev); +>  unsigned int mtk_dpi_encoder_index(struct device *dev); +> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_outproc.c b/drivers/gpu/drm/mediatek/mtk_disp_outproc.c +> new file mode 100644 +> index 000000000000..af473eb2fb77 +> --- /dev/null +> +++ b/drivers/gpu/drm/mediatek/mtk_disp_outproc.c +> @@ -0,0 +1,244 @@ +> +// SPDX-License-Identifier: GPL-2.0-only +> +/* +> + * Copyright (c) 2021 MediaTek Inc. +> + */ +> + +> +#include <drm/drm_fourcc.h> +> +#include <drm/drm_framebuffer.h> +> +#include <linux/clk.h> +> +#include <linux/component.h> +> +#include <linux/of_device.h> +> +#include <linux/of_address.h> +> +#include <linux/platform_device.h> +> +#include <linux/reset.h> +> +#include <linux/soc/mediatek/mtk-cmdq.h> +> +#include <linux/soc/mediatek/mtk-mmsys.h> +> + +> +#include "mtk_crtc.h" +> +#include "mtk_ddp_comp.h" +> +#include <linux/of.h> +> +#include "mtk_drm_drv.h" +> +#include "mtk_disp_outproc.h" +> + +> +#define DISP_REG_OVL_OUTPROC_INTEN0x004 +> +#define OVL_OUTPROC_FME_CPL_INTENBIT(1) +> +#define DISP_REG_OVL_OUTPROC_INTSTA0x008 +> +#define DISP_REG_OVL_OUTPROC_DATAPATH_CON0x010 +> +#define DATAPATH_CON_OUTPUT_CLAMPBIT(26) +> + +> +#define DISP_REG_OVL_OUTPROC_EN0x020 +> +#define OVL_OUTPROC_OVL_ENBIT(0) +> +#define DISP_REG_OVL_OUTPROC_RST0x024 +> +#define OVL_OUTPROC_RSTBIT(0) +> +#define DISP_REG_OVL_OUTPROC_SHADOW_CTRL0x028 +> +#define OVL_OUTPROC_BYPASS_SHADOWBIT(2) +> +#define DISP_REG_OVL_OUTPROC_ROI_SIZE0x030 +> + +> +struct mtk_disp_outproc { +> +void __iomem*regs; +> +struct clk*clk; +> +void(*vblank_cb)(void *data); +> +void*vblank_cb_data; +> +intirq; +> +struct cmdq_client_regcmdq_reg; +> +}; +> + +> +void mtk_disp_outproc_register_vblank_cb(struct device *dev, +> + void (*vblank_cb)(void *), +> + void *vblank_cb_data) +> +{ +> +struct mtk_disp_outproc *priv = dev_get_drvdata(dev); +> + +> +priv->vblank_cb = vblank_cb; +> +priv->vblank_cb_data = vblank_cb_data; +> +} +> + +> +void mtk_disp_outproc_unregister_vblank_cb(struct device *dev) +> +{ +> +struct mtk_disp_outproc *priv = dev_get_drvdata(dev); +> + +> +priv->vblank_cb = NULL; +> +priv->vblank_cb_data = NULL; +> +} +> + +> +void mtk_disp_outproc_enable_vblank(struct device *dev) +> +{ +> +struct mtk_disp_outproc *priv = dev_get_drvdata(dev); +> + +> +writel(OVL_OUTPROC_FME_CPL_INTEN, priv->regs + DISP_REG_OVL_OUTPROC_INTEN); +> +} +> + +> +void mtk_disp_outproc_disable_vblank(struct device *dev) +> +{ +> +struct mtk_disp_outproc *priv = dev_get_drvdata(dev); +> + +> +writel(0x0, priv->regs + DISP_REG_OVL_OUTPROC_INTEN); +> +} +> + +> +static irqreturn_t mtk_disp_outproc_irq_handler(int irq, void *dev_id) +> +{ +> +struct mtk_disp_outproc *priv = dev_id; +> + +> +writel(0x0, priv->regs + DISP_REG_OVL_OUTPROC_INTSTA); +> + +> +if (!priv->vblank_cb) +> +return IRQ_NONE; +> + +> +priv->vblank_cb(priv->vblank_cb_data); +> + +> +return IRQ_HANDLED; +> +} +> + +> +void mtk_disp_outproc_config(struct device *dev, unsigned int w, +> +     unsigned int h, unsigned int vrefresh, +> +     unsigned int bpc, struct cmdq_pkt *cmdq_pkt) +> +{ +> +struct mtk_disp_outproc *priv = dev_get_drvdata(dev); +> +unsigned int tmp; +> + +> +dev_dbg(dev, "%s-w:%d, h:%d\n", __func__, w, h); +> + +> +tmp = readl(priv->regs + DISP_REG_OVL_OUTPROC_SHADOW_CTRL); +> +tmp = tmp | OVL_OUTPROC_BYPASS_SHADOW; +> +writel(tmp, priv->regs + DISP_REG_OVL_OUTPROC_SHADOW_CTRL); + +Move bypass shadow to mtk_disp_outproc_start(). + +> + +> +mtk_ddp_write_mask(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs, +> +   DISP_REG_OVL_OUTPROC_ROI_SIZE, ~0); + +mtk_ddp_write(); + +> +mtk_ddp_write_mask(cmdq_pkt, DATAPATH_CON_OUTPUT_CLAMP, &priv->cmdq_reg, priv->regs, +> +   DISP_REG_OVL_OUTPROC_DATAPATH_CON, DATAPATH_CON_OUTPUT_CLAMP); +> +} +> + +> +void mtk_disp_outproc_start(struct device *dev) +> +{ +> +struct mtk_disp_outproc *priv = dev_get_drvdata(dev); +> + +> +mtk_ddp_write_mask(NULL, OVL_OUTPROC_RST, &priv->cmdq_reg, priv->regs, +> +   DISP_REG_OVL_OUTPROC_RST, OVL_OUTPROC_RST); + +writel(); + +> +mtk_ddp_write_mask(NULL, 0, &priv->cmdq_reg, priv->regs, +> +   DISP_REG_OVL_OUTPROC_RST, OVL_OUTPROC_RST); + +Some hardware reset before start. +Some hardware reset after stop. + +Could align this? + +> +mtk_ddp_write(NULL, 0, &priv->cmdq_reg, priv->regs, +> +      DISP_REG_OVL_OUTPROC_INTSTA); +> +mtk_ddp_write_mask(NULL, OVL_OUTPROC_OVL_EN, &priv->cmdq_reg, priv->regs, +> +   DISP_REG_OVL_OUTPROC_EN, OVL_OUTPROC_OVL_EN); +> +} +> + +> +void mtk_disp_outproc_stop(struct device *dev) +> +{ +> +struct mtk_disp_outproc *priv = dev_get_drvdata(dev); +> + +> +mtk_ddp_write(NULL, 0, &priv->cmdq_reg, priv->regs, +> +      DISP_REG_OVL_OUTPROC_INTEN); + +OVL driver does not disable interrupt when stop. +Align this with OVL driver. + +> +mtk_ddp_write_mask(NULL, 0, &priv->cmdq_reg, priv->regs, +> +   DISP_REG_OVL_OUTPROC_EN, OVL_OUTPROC_OVL_EN); +> +} +> + +> +int mtk_disp_outproc_clk_enable(struct device *dev) +> +{ +> +struct mtk_disp_outproc *priv = dev_get_drvdata(dev); +> + +> +return clk_prepare_enable(priv->clk); +> +} +> + +> +void mtk_disp_outproc_clk_disable(struct device *dev) +> +{ +> +struct mtk_disp_outproc *priv = dev_get_drvdata(dev); +> + +> +clk_disable_unprepare(priv->clk); +> +} +> + +> +static int mtk_disp_outproc_bind(struct device *dev, struct device *master, +> + void *data) +> +{ +> +return 0; +> +} +> + +> +static void mtk_disp_outproc_unbind(struct device *dev, struct device *master, void *data) +> +{ +> +} +> + +> +static const struct component_ops mtk_disp_outproc_component_ops = { +> +.bind= mtk_disp_outproc_bind, +> +.unbind = mtk_disp_outproc_unbind, +> +}; +> + +> +static int mtk_disp_outproc_probe(struct platform_device *pdev) +> +{ +> +struct device *dev = &pdev->dev; +> +struct resource *res; +> +struct mtk_disp_outproc *priv; +> +int ret = 0; +> + +> +priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); +> +if (!priv) +> +return -ENOMEM; +> + +> +res = platform_get_resource(pdev, IORESOURCE_MEM, 0); +> +priv->regs = devm_ioremap_resource(dev, res); +> +if (IS_ERR(priv->regs)) { +> +dev_err(dev, "failed to ioremap outproc\n"); +> +return PTR_ERR(priv->regs); +> +} +> + +> +priv->clk = devm_clk_get(dev, NULL); +> +if (IS_ERR(priv->clk)) { +> +dev_err(dev, "failed to get outproc clk\n"); +> +return PTR_ERR(priv->clk); +> +} +> + +> +#if IS_REACHABLE(CONFIG_MTK_CMDQ) +> +ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); +> +if (ret) +> +dev_dbg(dev, "No mediatek,gce-client-reg\n"); +> +#endif +> + +> +if (of_property_read_u32_index(dev->of_node, "interrupts", 0, &ret)) { +> +dev_dbg(dev, "interrupts not defined\n"); + +In binding document, interrupt is required. +So return with error code. + +> +} else { +> +priv->irq = platform_get_irq(pdev, 0); +> +if (priv->irq < 0) +> +priv->irq = 0; + +In binding document, interrupt is required. +So return with error code. + +Regards, +CK + +> + +> +if (priv->irq) { +> +ret = devm_request_irq(dev, priv->irq, mtk_disp_outproc_irq_handler, +> +       IRQF_TRIGGER_NONE, dev_name(dev), priv); +> +if (ret < 0) { +> +dev_err(dev, "Failed to request irq %d: %d\n", priv->irq, ret); +> +return ret; +> +} +> +} +> +} +> + +> +platform_set_drvdata(pdev, priv); +> + +> +ret = component_add(dev, &mtk_disp_outproc_component_ops); +> +if (ret) +> +dev_notice(dev, "Failed to add component: %d\n", ret); +> + +> +return ret; +> +} +> + +> +static void mtk_disp_outproc_remove(struct platform_device *pdev) +> +{ +> +component_del(&pdev->dev, &mtk_disp_outproc_component_ops); +> +} +> + +> +static const struct of_device_id mtk_disp_outproc_driver_dt_match[] = { +> +{ .compatible = "mediatek,mt8196-outproc"}, +> +{}, +> +}; +> + +> +MODULE_DEVICE_TABLE(of, mtk_disp_outproc_driver_dt_match); +> + +> +struct platform_driver mtk_disp_outproc_driver = { +> +.probe= mtk_disp_outproc_probe, +> +.remove= mtk_disp_outproc_remove, +> +.driver= { +> +.name= "mediatek-disp-outproc", +> +.owner= THIS_MODULE, +> +.of_match_table = mtk_disp_outproc_driver_dt_match, +> +}, +> +}; +> + +> +MODULE_AUTHOR("Nancy Lin <nancy.lin@mediatek.com>"); +> +MODULE_DESCRIPTION("MediaTek Output processing Driver"); +> +MODULE_LICENSE("GPL"); +> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_outproc.h b/drivers/gpu/drm/mediatek/mtk_disp_outproc.h +> new file mode 100644 +> index 000000000000..22ee5d845eae +> --- /dev/null +> +++ b/drivers/gpu/drm/mediatek/mtk_disp_outproc.h +> @@ -0,0 +1,22 @@ +> +/* SPDX-License-Identifier: GPL-2.0-only */ +> +/* +> + * Copyright (c) 2021 MediaTek Inc. +> + */ +> + +> +#ifndef __MTK_DISP_OUTPROC_H__ +> +#define __MTK_DISP_OUTPROC_H__ +> + +> +void mtk_disp_outproc_start(struct device *dev); +> +void mtk_disp_outproc_stop(struct device *dev); +> +int mtk_disp_outproc_clk_enable(struct device *dev); +> +void mtk_disp_outproc_clk_disable(struct device *dev); +> +void mtk_disp_outproc_config(struct device *dev, unsigned int w, +> +     unsigned int h, unsigned int vrefresh, +> +     unsigned int bpc, struct cmdq_pkt *cmdq_pkt); +> +void mtk_disp_outproc_register_vblank_cb(struct device *dev, +> + void (*vblank_cb)(void *), +> + void *vblank_cb_data); +> +void mtk_disp_outproc_unregister_vblank_cb(struct device *dev); +> +void mtk_disp_outproc_enable_vblank(struct device *dev); +> +void mtk_disp_outproc_disable_vblank(struct device *dev); +> +#endif +> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c +> index e4a0d9fe4e2d..27190057bd8e 100644 +> --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +> +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c +> @@ -1265,6 +1265,7 @@ static struct platform_driver * const mtk_drm_drivers[] = { +>  &mtk_disp_exdma_driver, +>  &mtk_disp_gamma_driver, +>  &mtk_disp_merge_driver, +> +&mtk_disp_outproc_driver, +>  &mtk_disp_ovl_adaptor_driver, +>  &mtk_disp_ovl_driver, +>  &mtk_disp_rdma_driver, +> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h +> index 89178de1478f..c4717c37b0f1 100644 +> --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h +> +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h +> @@ -76,6 +76,7 @@ extern struct platform_driver mtk_disp_color_driver; +>  extern struct platform_driver mtk_disp_exdma_driver; +>  extern struct platform_driver mtk_disp_gamma_driver; +>  extern struct platform_driver mtk_disp_merge_driver; +> +extern struct platform_driver mtk_disp_outproc_driver; +>  extern struct platform_driver mtk_disp_ovl_adaptor_driver; +>  extern struct platform_driver mtk_disp_ovl_driver; +>  extern struct platform_driver mtk_disp_rdma_driver; + + +</pre> +</p></body></html><!--type:text--><!--{--><pre>************* MEDIATEK Confidentiality Notice + ******************** +The information contained in this e-mail message (including any +attachments) may be confidential, proprietary, privileged, or otherwise +exempt from disclosure under applicable laws. It is intended to be +conveyed only to the designated recipient(s). Any use, dissemination, +distribution, printing, retaining or copying of this e-mail (including its +attachments) by unintended recipient(s) is strictly prohibited and may +be unlawful. If you are not an intended recipient of this e-mail, or believe + +that you have received this e-mail in error, please notify the sender +immediately (by replying to this e-mail), delete any and all copies of +this e-mail (including any attachments) from your system, and do not +disclose the content of this e-mail to any other person. Thank you! +</pre><!--}--> diff --git a/N1/2.hdr b/N1/2.hdr new file mode 100644 index 0000000..da1f671 --- /dev/null +++ b/N1/2.hdr @@ -0,0 +1,3 @@ +Content-Type: text/html; + charset="utf-8" +Content-Transfer-Encoding: base64 diff --git a/a/content_digest b/N1/content_digest index aac2928..d8ed99f 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -24,7 +24,7 @@ p.zabel@pengutronix.de <p.zabel@pengutronix.de> " Sirius Wang (\347\216\213\347\232\223\346\230\261) <Sirius.Wang@mediatek.com>" " linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0" - "\00:1\0" + "\01:1\0" "b\0" "Hi, Paul:\n" "\n" @@ -444,5 +444,445 @@ "> extern struct platform_driver mtk_disp_ovl_adaptor_driver;\n" "> extern struct platform_driver mtk_disp_ovl_driver;\n" > extern struct platform_driver mtk_disp_rdma_driver; + "\01:2\0" + "b\0" + "<html><body><p>\r\n" + "<pre>\r\n" + "Hi, Paul:\r\n" + "\r\n" + "On Fri, 2025-01-10 at 20:34 +0800, paul-pl.chen wrote:\r\n" + "> From: "Nancy.Lin" <nancy.lin@mediatek.com>\r\n" + "> \r\n" + "> OUTPROC handles the post-stage of pixel processing in\r\n" + "> the overlapping procedure.OUTPROC manages pixels for\r\n" + "> gamma correction and ensures that pixel values are\r\n" + "> within the correct range.\r\n" + "> \r\n" + "> Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>\r\n" + "> Signed-off-by: Paul-pl.Chen <paul-pl.chen@mediatek.com>\r\n" + "> ---\r\n" + ">  drivers/gpu/drm/mediatek/Makefile           |   1 +\r\n" + ">  drivers/gpu/drm/mediatek/mtk_ddp_comp.c     |   1 +\r\n" + ">  drivers/gpu/drm/mediatek/mtk_ddp_comp.h     |   1 +\r\n" + ">  drivers/gpu/drm/mediatek/mtk_disp_drv.h     |  14 ++\r\n" + ">  drivers/gpu/drm/mediatek/mtk_disp_outproc.c | 244 ++++++++++++++++++++\r\n" + ">  drivers/gpu/drm/mediatek/mtk_disp_outproc.h |  22 ++\r\n" + ">  drivers/gpu/drm/mediatek/mtk_drm_drv.c      |   1 +\r\n" + ">  drivers/gpu/drm/mediatek/mtk_drm_drv.h      |   1 +\r\n" + ">  8 files changed, 285 insertions(+)\r\n" + ">  create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_outproc.c\r\n" + ">  create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_outproc.h\r\n" + "> \r\n" + "> diff --git a/drivers/gpu/drm/mediatek/Makefile b/drivers/gpu/drm/mediatek/Makefile\r\n" + "> index a7b9ebe27f68..9546bc6b7b2e 100644\r\n" + "> --- a/drivers/gpu/drm/mediatek/Makefile\r\n" + "> +++ b/drivers/gpu/drm/mediatek/Makefile\r\n" + "> @@ -10,6 +10,7 @@ mediatek-drm-y := mtk_crtc.o \\r\n" + ">    mtk_disp_gamma.o \\r\n" + ">    mtk_disp_merge.o \\r\n" + ">    mtk_disp_ovl.o \\r\n" + "> +  mtk_disp_outproc.o \\r\n" + ">    mtk_disp_ovl_adaptor.o \\r\n" + ">    mtk_disp_rdma.o \\r\n" + ">    mtk_drm_drv.o \\r\n" + "> diff --git a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c\r\n" + "> index e65c6df987f2..cc780744f060 100644\r\n" + "> --- a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c\r\n" + "> +++ b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c\r\n" + "> @@ -447,6 +447,7 @@ static const char * const mtk_ddp_comp_stem[MTK_DDP_COMP_TYPE_MAX] = {\r\n" + ">  [MTK_DSI] = "dsi",\r\n" + ">  [MTK_OVL_BLENDER] = "blender",\r\n" + ">  [MTK_OVL_EXDMA] = "exdma",\r\n" + "> +[MTK_OVL_OUTPROC] = "outproc",\r\n" + ">  };\r\n" + ">  \r\n" + ">  struct mtk_ddp_comp_match {\r\n" + "> diff --git a/drivers/gpu/drm/mediatek/mtk_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_ddp_comp.h\r\n" + "> index 075ba5683f93..b33d3289b8b6 100644\r\n" + "> --- a/drivers/gpu/drm/mediatek/mtk_ddp_comp.h\r\n" + "> +++ b/drivers/gpu/drm/mediatek/mtk_ddp_comp.h\r\n" + "> @@ -45,6 +45,7 @@ enum mtk_ddp_comp_type {\r\n" + ">  MTK_DSI,\r\n" + ">  MTK_OVL_BLENDER,\r\n" + ">  MTK_OVL_EXDMA,\r\n" + "> +MTK_OVL_OUTPROC,\r\n" + ">  MTK_DDP_COMP_TYPE_MAX,\r\n" + ">  };\r\n" + ">  \r\n" + "> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h\r\n" + "> index 719191f05b27..44d2cbe919dc 100644\r\n" + "> --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h\r\n" + "> +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h\r\n" + "> @@ -64,6 +64,20 @@ void mtk_dither_set_common(void __iomem *regs, struct cmdq_client_reg *cmdq_reg,\r\n" + ">     unsigned int bpc, unsigned int cfg,\r\n" + ">     unsigned int dither_en, struct cmdq_pkt *cmdq_pkt);\r\n" + ">  \r\n" + "> +void mtk_disp_outproc_start(struct device *dev);\r\n" + "> +void mtk_disp_outproc_stop(struct device *dev);\r\n" + "> +int mtk_disp_outproc_clk_enable(struct device *dev);\r\n" + "> +void mtk_disp_outproc_clk_disable(struct device *dev);\r\n" + "> +void mtk_disp_outproc_config(struct device *dev, unsigned int w,\r\n" + "> +     unsigned int h, unsigned int vrefresh,\r\n" + "> +     unsigned int bpc, struct cmdq_pkt *cmdq_pkt);\r\n" + "> +void mtk_disp_outproc_register_vblank_cb(struct device *dev,\r\n" + "> + void (*vblank_cb)(void *),\r\n" + "> + void *vblank_cb_data);\r\n" + "> +void mtk_disp_outproc_unregister_vblank_cb(struct device *dev);\r\n" + "> +void mtk_disp_outproc_enable_vblank(struct device *dev);\r\n" + "> +void mtk_disp_outproc_disable_vblank(struct device *dev);\r\n" + "> +\r\n" + ">  void mtk_dpi_start(struct device *dev);\r\n" + ">  void mtk_dpi_stop(struct device *dev);\r\n" + ">  unsigned int mtk_dpi_encoder_index(struct device *dev);\r\n" + "> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_outproc.c b/drivers/gpu/drm/mediatek/mtk_disp_outproc.c\r\n" + "> new file mode 100644\r\n" + "> index 000000000000..af473eb2fb77\r\n" + "> --- /dev/null\r\n" + "> +++ b/drivers/gpu/drm/mediatek/mtk_disp_outproc.c\r\n" + "> @@ -0,0 +1,244 @@\r\n" + "> +// SPDX-License-Identifier: GPL-2.0-only\r\n" + "> +/*\r\n" + "> + * Copyright (c) 2021 MediaTek Inc.\r\n" + "> + */\r\n" + "> +\r\n" + "> +#include <drm/drm_fourcc.h>\r\n" + "> +#include <drm/drm_framebuffer.h>\r\n" + "> +#include <linux/clk.h>\r\n" + "> +#include <linux/component.h>\r\n" + "> +#include <linux/of_device.h>\r\n" + "> +#include <linux/of_address.h>\r\n" + "> +#include <linux/platform_device.h>\r\n" + "> +#include <linux/reset.h>\r\n" + "> +#include <linux/soc/mediatek/mtk-cmdq.h>\r\n" + "> +#include <linux/soc/mediatek/mtk-mmsys.h>\r\n" + "> +\r\n" + "> +#include "mtk_crtc.h"\r\n" + "> +#include "mtk_ddp_comp.h"\r\n" + "> +#include <linux/of.h>\r\n" + "> +#include "mtk_drm_drv.h"\r\n" + "> +#include "mtk_disp_outproc.h"\r\n" + "> +\r\n" + "> +#define DISP_REG_OVL_OUTPROC_INTEN0x004\r\n" + "> +#define OVL_OUTPROC_FME_CPL_INTENBIT(1)\r\n" + "> +#define DISP_REG_OVL_OUTPROC_INTSTA0x008\r\n" + "> +#define DISP_REG_OVL_OUTPROC_DATAPATH_CON0x010\r\n" + "> +#define DATAPATH_CON_OUTPUT_CLAMPBIT(26)\r\n" + "> +\r\n" + "> +#define DISP_REG_OVL_OUTPROC_EN0x020\r\n" + "> +#define OVL_OUTPROC_OVL_ENBIT(0)\r\n" + "> +#define DISP_REG_OVL_OUTPROC_RST0x024\r\n" + "> +#define OVL_OUTPROC_RSTBIT(0)\r\n" + "> +#define DISP_REG_OVL_OUTPROC_SHADOW_CTRL0x028\r\n" + "> +#define OVL_OUTPROC_BYPASS_SHADOWBIT(2)\r\n" + "> +#define DISP_REG_OVL_OUTPROC_ROI_SIZE0x030\r\n" + "> +\r\n" + "> +struct mtk_disp_outproc {\r\n" + "> +void __iomem*regs;\r\n" + "> +struct clk*clk;\r\n" + "> +void(*vblank_cb)(void *data);\r\n" + "> +void*vblank_cb_data;\r\n" + "> +intirq;\r\n" + "> +struct cmdq_client_regcmdq_reg;\r\n" + "> +};\r\n" + "> +\r\n" + "> +void mtk_disp_outproc_register_vblank_cb(struct device *dev,\r\n" + "> + void (*vblank_cb)(void *),\r\n" + "> + void *vblank_cb_data)\r\n" + "> +{\r\n" + "> +struct mtk_disp_outproc *priv = dev_get_drvdata(dev);\r\n" + "> +\r\n" + "> +priv->vblank_cb = vblank_cb;\r\n" + "> +priv->vblank_cb_data = vblank_cb_data;\r\n" + "> +}\r\n" + "> +\r\n" + "> +void mtk_disp_outproc_unregister_vblank_cb(struct device *dev)\r\n" + "> +{\r\n" + "> +struct mtk_disp_outproc *priv = dev_get_drvdata(dev);\r\n" + "> +\r\n" + "> +priv->vblank_cb = NULL;\r\n" + "> +priv->vblank_cb_data = NULL;\r\n" + "> +}\r\n" + "> +\r\n" + "> +void mtk_disp_outproc_enable_vblank(struct device *dev)\r\n" + "> +{\r\n" + "> +struct mtk_disp_outproc *priv = dev_get_drvdata(dev);\r\n" + "> +\r\n" + "> +writel(OVL_OUTPROC_FME_CPL_INTEN, priv->regs + DISP_REG_OVL_OUTPROC_INTEN);\r\n" + "> +}\r\n" + "> +\r\n" + "> +void mtk_disp_outproc_disable_vblank(struct device *dev)\r\n" + "> +{\r\n" + "> +struct mtk_disp_outproc *priv = dev_get_drvdata(dev);\r\n" + "> +\r\n" + "> +writel(0x0, priv->regs + DISP_REG_OVL_OUTPROC_INTEN);\r\n" + "> +}\r\n" + "> +\r\n" + "> +static irqreturn_t mtk_disp_outproc_irq_handler(int irq, void *dev_id)\r\n" + "> +{\r\n" + "> +struct mtk_disp_outproc *priv = dev_id;\r\n" + "> +\r\n" + "> +writel(0x0, priv->regs + DISP_REG_OVL_OUTPROC_INTSTA);\r\n" + "> +\r\n" + "> +if (!priv->vblank_cb)\r\n" + "> +return IRQ_NONE;\r\n" + "> +\r\n" + "> +priv->vblank_cb(priv->vblank_cb_data);\r\n" + "> +\r\n" + "> +return IRQ_HANDLED;\r\n" + "> +}\r\n" + "> +\r\n" + "> +void mtk_disp_outproc_config(struct device *dev, unsigned int w,\r\n" + "> +     unsigned int h, unsigned int vrefresh,\r\n" + "> +     unsigned int bpc, struct cmdq_pkt *cmdq_pkt)\r\n" + "> +{\r\n" + "> +struct mtk_disp_outproc *priv = dev_get_drvdata(dev);\r\n" + "> +unsigned int tmp;\r\n" + "> +\r\n" + "> +dev_dbg(dev, "%s-w:%d, h:%d\n", __func__, w, h);\r\n" + "> +\r\n" + "> +tmp = readl(priv->regs + DISP_REG_OVL_OUTPROC_SHADOW_CTRL);\r\n" + "> +tmp = tmp | OVL_OUTPROC_BYPASS_SHADOW;\r\n" + "> +writel(tmp, priv->regs + DISP_REG_OVL_OUTPROC_SHADOW_CTRL);\r\n" + "\r\n" + "Move bypass shadow to mtk_disp_outproc_start().\r\n" + "\r\n" + "> +\r\n" + "> +mtk_ddp_write_mask(cmdq_pkt, h << 16 | w, &priv->cmdq_reg, priv->regs,\r\n" + "> +   DISP_REG_OVL_OUTPROC_ROI_SIZE, ~0);\r\n" + "\r\n" + "mtk_ddp_write();\r\n" + "\r\n" + "> +mtk_ddp_write_mask(cmdq_pkt, DATAPATH_CON_OUTPUT_CLAMP, &priv->cmdq_reg, priv->regs,\r\n" + "> +   DISP_REG_OVL_OUTPROC_DATAPATH_CON, DATAPATH_CON_OUTPUT_CLAMP);\r\n" + "> +}\r\n" + "> +\r\n" + "> +void mtk_disp_outproc_start(struct device *dev)\r\n" + "> +{\r\n" + "> +struct mtk_disp_outproc *priv = dev_get_drvdata(dev);\r\n" + "> +\r\n" + "> +mtk_ddp_write_mask(NULL, OVL_OUTPROC_RST, &priv->cmdq_reg, priv->regs,\r\n" + "> +   DISP_REG_OVL_OUTPROC_RST, OVL_OUTPROC_RST);\r\n" + "\r\n" + "writel();\r\n" + "\r\n" + "> +mtk_ddp_write_mask(NULL, 0, &priv->cmdq_reg, priv->regs,\r\n" + "> +   DISP_REG_OVL_OUTPROC_RST, OVL_OUTPROC_RST);\r\n" + "\r\n" + "Some hardware reset before start.\r\n" + "Some hardware reset after stop.\r\n" + "\r\n" + "Could align this?\r\n" + "\r\n" + "> +mtk_ddp_write(NULL, 0, &priv->cmdq_reg, priv->regs,\r\n" + "> +      DISP_REG_OVL_OUTPROC_INTSTA);\r\n" + "> +mtk_ddp_write_mask(NULL, OVL_OUTPROC_OVL_EN, &priv->cmdq_reg, priv->regs,\r\n" + "> +   DISP_REG_OVL_OUTPROC_EN, OVL_OUTPROC_OVL_EN);\r\n" + "> +}\r\n" + "> +\r\n" + "> +void mtk_disp_outproc_stop(struct device *dev)\r\n" + "> +{\r\n" + "> +struct mtk_disp_outproc *priv = dev_get_drvdata(dev);\r\n" + "> +\r\n" + "> +mtk_ddp_write(NULL, 0, &priv->cmdq_reg, priv->regs,\r\n" + "> +      DISP_REG_OVL_OUTPROC_INTEN);\r\n" + "\r\n" + "OVL driver does not disable interrupt when stop.\r\n" + "Align this with OVL driver.\r\n" + "\r\n" + "> +mtk_ddp_write_mask(NULL, 0, &priv->cmdq_reg, priv->regs,\r\n" + "> +   DISP_REG_OVL_OUTPROC_EN, OVL_OUTPROC_OVL_EN);\r\n" + "> +}\r\n" + "> +\r\n" + "> +int mtk_disp_outproc_clk_enable(struct device *dev)\r\n" + "> +{\r\n" + "> +struct mtk_disp_outproc *priv = dev_get_drvdata(dev);\r\n" + "> +\r\n" + "> +return clk_prepare_enable(priv->clk);\r\n" + "> +}\r\n" + "> +\r\n" + "> +void mtk_disp_outproc_clk_disable(struct device *dev)\r\n" + "> +{\r\n" + "> +struct mtk_disp_outproc *priv = dev_get_drvdata(dev);\r\n" + "> +\r\n" + "> +clk_disable_unprepare(priv->clk);\r\n" + "> +}\r\n" + "> +\r\n" + "> +static int mtk_disp_outproc_bind(struct device *dev, struct device *master,\r\n" + "> + void *data)\r\n" + "> +{\r\n" + "> +return 0;\r\n" + "> +}\r\n" + "> +\r\n" + "> +static void mtk_disp_outproc_unbind(struct device *dev, struct device *master, void *data)\r\n" + "> +{\r\n" + "> +}\r\n" + "> +\r\n" + "> +static const struct component_ops mtk_disp_outproc_component_ops = {\r\n" + "> +.bind= mtk_disp_outproc_bind,\r\n" + "> +.unbind = mtk_disp_outproc_unbind,\r\n" + "> +};\r\n" + "> +\r\n" + "> +static int mtk_disp_outproc_probe(struct platform_device *pdev)\r\n" + "> +{\r\n" + "> +struct device *dev = &pdev->dev;\r\n" + "> +struct resource *res;\r\n" + "> +struct mtk_disp_outproc *priv;\r\n" + "> +int ret = 0;\r\n" + "> +\r\n" + "> +priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);\r\n" + "> +if (!priv)\r\n" + "> +return -ENOMEM;\r\n" + "> +\r\n" + "> +res = platform_get_resource(pdev, IORESOURCE_MEM, 0);\r\n" + "> +priv->regs = devm_ioremap_resource(dev, res);\r\n" + "> +if (IS_ERR(priv->regs)) {\r\n" + "> +dev_err(dev, "failed to ioremap outproc\n");\r\n" + "> +return PTR_ERR(priv->regs);\r\n" + "> +}\r\n" + "> +\r\n" + "> +priv->clk = devm_clk_get(dev, NULL);\r\n" + "> +if (IS_ERR(priv->clk)) {\r\n" + "> +dev_err(dev, "failed to get outproc clk\n");\r\n" + "> +return PTR_ERR(priv->clk);\r\n" + "> +}\r\n" + "> +\r\n" + "> +#if IS_REACHABLE(CONFIG_MTK_CMDQ)\r\n" + "> +ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0);\r\n" + "> +if (ret)\r\n" + "> +dev_dbg(dev, "No mediatek,gce-client-reg\n");\r\n" + "> +#endif\r\n" + "> +\r\n" + "> +if (of_property_read_u32_index(dev->of_node, "interrupts", 0, &ret)) {\r\n" + "> +dev_dbg(dev, "interrupts not defined\n");\r\n" + "\r\n" + "In binding document, interrupt is required.\r\n" + "So return with error code.\r\n" + "\r\n" + "> +} else {\r\n" + "> +priv->irq = platform_get_irq(pdev, 0);\r\n" + "> +if (priv->irq < 0)\r\n" + "> +priv->irq = 0;\r\n" + "\r\n" + "In binding document, interrupt is required.\r\n" + "So return with error code.\r\n" + "\r\n" + "Regards,\r\n" + "CK\r\n" + "\r\n" + "> +\r\n" + "> +if (priv->irq) {\r\n" + "> +ret = devm_request_irq(dev, priv->irq, mtk_disp_outproc_irq_handler,\r\n" + "> +       IRQF_TRIGGER_NONE, dev_name(dev), priv);\r\n" + "> +if (ret < 0) {\r\n" + "> +dev_err(dev, "Failed to request irq %d: %d\n", priv->irq, ret);\r\n" + "> +return ret;\r\n" + "> +}\r\n" + "> +}\r\n" + "> +}\r\n" + "> +\r\n" + "> +platform_set_drvdata(pdev, priv);\r\n" + "> +\r\n" + "> +ret = component_add(dev, &mtk_disp_outproc_component_ops);\r\n" + "> +if (ret)\r\n" + "> +dev_notice(dev, "Failed to add component: %d\n", ret);\r\n" + "> +\r\n" + "> +return ret;\r\n" + "> +}\r\n" + "> +\r\n" + "> +static void mtk_disp_outproc_remove(struct platform_device *pdev)\r\n" + "> +{\r\n" + "> +component_del(&pdev->dev, &mtk_disp_outproc_component_ops);\r\n" + "> +}\r\n" + "> +\r\n" + "> +static const struct of_device_id mtk_disp_outproc_driver_dt_match[] = {\r\n" + "> +{ .compatible = "mediatek,mt8196-outproc"},\r\n" + "> +{},\r\n" + "> +};\r\n" + "> +\r\n" + "> +MODULE_DEVICE_TABLE(of, mtk_disp_outproc_driver_dt_match);\r\n" + "> +\r\n" + "> +struct platform_driver mtk_disp_outproc_driver = {\r\n" + "> +.probe= mtk_disp_outproc_probe,\r\n" + "> +.remove= mtk_disp_outproc_remove,\r\n" + "> +.driver= {\r\n" + "> +.name= "mediatek-disp-outproc",\r\n" + "> +.owner= THIS_MODULE,\r\n" + "> +.of_match_table = mtk_disp_outproc_driver_dt_match,\r\n" + "> +},\r\n" + "> +};\r\n" + "> +\r\n" + "> +MODULE_AUTHOR("Nancy Lin <nancy.lin@mediatek.com>");\r\n" + "> +MODULE_DESCRIPTION("MediaTek Output processing Driver");\r\n" + "> +MODULE_LICENSE("GPL");\r\n" + "> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_outproc.h b/drivers/gpu/drm/mediatek/mtk_disp_outproc.h\r\n" + "> new file mode 100644\r\n" + "> index 000000000000..22ee5d845eae\r\n" + "> --- /dev/null\r\n" + "> +++ b/drivers/gpu/drm/mediatek/mtk_disp_outproc.h\r\n" + "> @@ -0,0 +1,22 @@\r\n" + "> +/* SPDX-License-Identifier: GPL-2.0-only */\r\n" + "> +/*\r\n" + "> + * Copyright (c) 2021 MediaTek Inc.\r\n" + "> + */\r\n" + "> +\r\n" + "> +#ifndef __MTK_DISP_OUTPROC_H__\r\n" + "> +#define __MTK_DISP_OUTPROC_H__\r\n" + "> +\r\n" + "> +void mtk_disp_outproc_start(struct device *dev);\r\n" + "> +void mtk_disp_outproc_stop(struct device *dev);\r\n" + "> +int mtk_disp_outproc_clk_enable(struct device *dev);\r\n" + "> +void mtk_disp_outproc_clk_disable(struct device *dev);\r\n" + "> +void mtk_disp_outproc_config(struct device *dev, unsigned int w,\r\n" + "> +     unsigned int h, unsigned int vrefresh,\r\n" + "> +     unsigned int bpc, struct cmdq_pkt *cmdq_pkt);\r\n" + "> +void mtk_disp_outproc_register_vblank_cb(struct device *dev,\r\n" + "> + void (*vblank_cb)(void *),\r\n" + "> + void *vblank_cb_data);\r\n" + "> +void mtk_disp_outproc_unregister_vblank_cb(struct device *dev);\r\n" + "> +void mtk_disp_outproc_enable_vblank(struct device *dev);\r\n" + "> +void mtk_disp_outproc_disable_vblank(struct device *dev);\r\n" + "> +#endif\r\n" + "> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c\r\n" + "> index e4a0d9fe4e2d..27190057bd8e 100644\r\n" + "> --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c\r\n" + "> +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c\r\n" + "> @@ -1265,6 +1265,7 @@ static struct platform_driver * const mtk_drm_drivers[] = {\r\n" + ">  &mtk_disp_exdma_driver,\r\n" + ">  &mtk_disp_gamma_driver,\r\n" + ">  &mtk_disp_merge_driver,\r\n" + "> +&mtk_disp_outproc_driver,\r\n" + ">  &mtk_disp_ovl_adaptor_driver,\r\n" + ">  &mtk_disp_ovl_driver,\r\n" + ">  &mtk_disp_rdma_driver,\r\n" + "> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h\r\n" + "> index 89178de1478f..c4717c37b0f1 100644\r\n" + "> --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h\r\n" + "> +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h\r\n" + "> @@ -76,6 +76,7 @@ extern struct platform_driver mtk_disp_color_driver;\r\n" + ">  extern struct platform_driver mtk_disp_exdma_driver;\r\n" + ">  extern struct platform_driver mtk_disp_gamma_driver;\r\n" + ">  extern struct platform_driver mtk_disp_merge_driver;\r\n" + "> +extern struct platform_driver mtk_disp_outproc_driver;\r\n" + ">  extern struct platform_driver mtk_disp_ovl_adaptor_driver;\r\n" + ">  extern struct platform_driver mtk_disp_ovl_driver;\r\n" + ">  extern struct platform_driver mtk_disp_rdma_driver;\r\n" + "\r\n" + "\r\n" + "</pre>\r\n" + "</p></body></html><!--type:text--><!--{--><pre>************* MEDIATEK Confidentiality Notice\r\n" + " ********************\r\n" + "The information contained in this e-mail message (including any \r\n" + "attachments) may be confidential, proprietary, privileged, or otherwise\r\n" + "exempt from disclosure under applicable laws. It is intended to be \r\n" + "conveyed only to the designated recipient(s). Any use, dissemination, \r\n" + "distribution, printing, retaining or copying of this e-mail (including its \r\n" + "attachments) by unintended recipient(s) is strictly prohibited and may \r\n" + "be unlawful. If you are not an intended recipient of this e-mail, or believe\r\n" + " \r\n" + "that you have received this e-mail in error, please notify the sender \r\n" + "immediately (by replying to this e-mail), delete any and all copies of \r\n" + "this e-mail (including any attachments) from your system, and do not\r\n" + "disclose the content of this e-mail to any other person. Thank you!\r\n" + </pre><!--}--> -2cf863108065cb3be2863fed0cfebf4f0e4134869fcb355ff095cf7efa020045 +60490f96ec68cc160379c2807c49760e1c0d684bf137d73f06cabe0ff49f81b3
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