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([2a01:e0a:f0e:9070:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-488682673bdsm7322098f8f.2.2026.09.23.07.31.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 23 Sep 2026 07:31:37 -0700 (PDT) Message-ID: <1ccea6d2-418c-481a-85ff-072d3dd837b3@redhat.com> Date: Wed, 23 Sep 2026 16:31:35 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v9 03/26] target/arm/cpu-sysregs.h.inc: Update with automatic generation Content-Language: en-US To: Khushit Shah Cc: "eric.auger.pro@gmail.com" , "qemu-devel@nongnu.org" , "qemu-arm@nongnu.org" , "kvmarm@lists.linux.dev" , "peter.maydell@linaro.org" , Shaju Abraham , "yangjinqian1@huawei.com" , "cohuck@redhat.com" , "richard.henderson@linaro.org" , "sebott@redhat.com" , "skolothumtho@nvidia.com" , "philmd@oss.qualcomm.com" , "maz@kernel.org" , "oliver.upton@linux.dev" , "pbonzini@redhat.com" , "armbru@redhat.com" , "berrange@redhat.com" , "abologna@redhat.com" , "jdenemar@redhat.com" References: <20260916144721.751810-1-eric.auger@redhat.com> <20260916144721.751810-4-eric.auger@redhat.com> From: Eric Auger In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 9/23/26 11:13 AM, Khushit Shah wrote: > >> On 16 Sep 2026, at 8:15 PM, Eric Auger wrote: >> >> !-------------------------------------------------------------------| >> CAUTION: External Email >> >> |-------------------------------------------------------------------! >> >> Generated definitions with scripts/update-aarch64-cpu-sysregs-header.py >> based on "AARCHMRS containing the JSON files for Arm A-profile >> architecture (2026-03)" Registers.json file. >> >> Signed-off-by: Eric Auger >> Signed-off-by: Cornelia Huck >> Reviewed-by: Shameer Kolothum >> --- >> target/arm/cpu-sysregs.h.inc | 11 +++++++++++ >> 1 file changed, 11 insertions(+) >> >> diff --git a/target/arm/cpu-sysregs.h.inc b/target/arm/cpu-sysregs.h.inc >> index ec5a12b0f4..8b77c490d4 100644 >> --- a/target/arm/cpu-sysregs.h.inc >> +++ b/target/arm/cpu-sysregs.h.inc >> @@ -1,11 +1,18 @@ >> /* SPDX-License-Identifier: GPL-2.0-or-later */ >> + >> +/* This file is autogenerated by scripts/update-aarch64-cpu-sysregs-header.py */ >> +/* DEF(, , , , , ) */ >> + >> +DEF(AIDR_EL1, 3, 1, 0, 0, 7) >> DEF(CLIDR_EL1, 3, 1, 0, 0, 1) >> DEF(CTR_EL0, 3, 3, 0, 0, 1) >> DEF(DCZID_EL0, 3, 3, 0, 0, 7) >> +DEF(GMID_EL1, 3, 1, 0, 0, 4) >> DEF(ID_AA64AFR0_EL1, 3, 0, 0, 5, 4) >> DEF(ID_AA64AFR1_EL1, 3, 0, 0, 5, 5) >> DEF(ID_AA64DFR0_EL1, 3, 0, 0, 5, 0) >> DEF(ID_AA64DFR1_EL1, 3, 0, 0, 5, 1) >> +DEF(ID_AA64DFR2_EL1, 3, 0, 0, 5, 2) >> DEF(ID_AA64FPFR0_EL1, 3, 0, 0, 4, 7) >> DEF(ID_AA64ISAR0_EL1, 3, 0, 0, 6, 0) >> DEF(ID_AA64ISAR1_EL1, 3, 0, 0, 6, 1) >> @@ -40,6 +47,10 @@ DEF(ID_MMFR5_EL1, 3, 0, 0, 3, 6) >> DEF(ID_PFR0_EL1, 3, 0, 0, 1, 0) >> DEF(ID_PFR1_EL1, 3, 0, 0, 1, 1) >> DEF(ID_PFR2_EL1, 3, 0, 0, 3, 4) >> +DEF(MIDR_EL1, 3, 0, 0, 0, 0) >> +DEF(MPIDR_EL1, 3, 0, 0, 0, 5) >> DEF(MVFR0_EL1, 3, 0, 0, 3, 0) >> DEF(MVFR1_EL1, 3, 0, 0, 3, 1) >> DEF(MVFR2_EL1, 3, 0, 0, 3, 2) >> +DEF(REVIDR_EL1, 3, 0, 0, 0, 6) >> +DEF(SMIDR_EL1, 3, 1, 0, 0, 6) > After this, we should probably refactor cpu->midr/revidr/mp_affinity into the idregs[]? Hum yes. We can now rely on MIDR, REVIDR and MPIDR storage in isar.idregs[]. I will handle that in v10 Thanks Eric > > Warm Regards, > Khushit >> -- >> 2.53.0 >>