From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marc Zyngier Subject: Re: [PATCH v3 7/9] KVM: arm/arm64: Only clean the dcache on translation fault Date: Thu, 23 Aug 2018 12:16:48 +0100 Message-ID: <1f59ea80-a88e-e09d-bb55-cd1a514bc957@arm.com> References: <20171023161122.15291-1-marc.zyngier@arm.com> <20171023161122.15291-8-marc.zyngier@arm.com> <9fa7efdf-1c21-7b07-edb9-0c7d0d91eaed@arm.com> <2686ddfc-935a-18e0-46bd-0cb608ae44e1@suse.de> <4d1c7d3b-4abe-fa8d-31ac-7a98ec349db1@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 4AC6B4A227 for ; Thu, 23 Aug 2018 07:16:54 -0400 (EDT) Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id PcEskXsmdrl9 for ; Thu, 23 Aug 2018 07:16:52 -0400 (EDT) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 563B34A1E1 for ; Thu, 23 Aug 2018 07:16:52 -0400 (EDT) In-Reply-To: Content-Language: en-GB List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu To: Alexander Graf , Christoffer Dall , Catalin Marinas , Will Deacon Cc: Dave Martin , linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu List-Id: kvmarm@lists.cs.columbia.edu T24gMjEvMDgvMTggMTc6NTQsIEFsZXhhbmRlciBHcmFmIHdyb3RlOgo+IE9uIDA4LzIxLzIwMTgg MDU6MDggUE0sIE1hcmMgWnluZ2llciB3cm90ZToKPj4gT24gMjEvMDgvMTggMTU6MDgsIEFsZXhh bmRlciBHcmFmIHdyb3RlOgo+Pj4gT24gMDgvMjEvMjAxOCAwMzo1NyBQTSwgTWFyYyBaeW5naWVy IHdyb3RlOgo+Pj4+IE9uIDIxLzA4LzE4IDE0OjM1LCBBbGV4YW5kZXIgR3JhZiB3cm90ZToKPj4+ Pj4gT24gMTAvMjMvMjAxNyAwNjoxMSBQTSwgTWFyYyBaeW5naWVyIHdyb3RlOgo+Pj4+Pj4gVGhl IG9ubHkgY2FzZSB3aGVyZSB3ZSBhY3R1YWxseSBuZWVkIHRvIHBlcmZvcm0gYSBkY2FjaGUgbWFp bnRlbmFuY2UKPj4+Pj4+IGlzIHdoZW4gd2UgbWFwIHRoZSBwYWdlIGZvciB0aGUgZmlyc3QgdGlt ZSwgYW5kIHN1YnNlcXVlbnQgcGVybWlzc2lvbgo+Pj4+Pj4gZmF1bHRzIGRvIG5vdCByZXF1aXJl IGNhY2hlIG1haW50ZW5hbmNlLiBMZXQncyBtYWtlIGl0IGNvbmRpdGlvbmFsCj4+Pj4+PiBvbiBu b3QgYmVpbmcgYSBwZXJtaXNzaW9uIGZhdWx0IChhbmQgdGh1cyBhIHRyYW5zbGF0aW9uIGZhdWx0 KS4KPj4+Pj4+Cj4+Pj4+PiBSZXZpZXdlZC1ieTogQ2hyaXN0b2ZmZXIgRGFsbCA8Y2hyaXN0b2Zm ZXIuZGFsbEBsaW5hcm8ub3JnPgo+Pj4+Pj4gU2lnbmVkLW9mZi1ieTogTWFyYyBaeW5naWVyIDxt YXJjLnp5bmdpZXJAYXJtLmNvbT4KPj4+Pj4gVGhpcyBwYXRjaCB1bmZvcnR1bmF0ZWx5IGJyZWFr cyBzb21ldGhpbmcgb24gSGkxNjE2IFNvQ3Mgd2hlbiBydW5uaW5nCj4+Pj4+IDMyYml0IGd1ZXN0 cy4gV2l0aCB0aGlzIHBhdGNoIGFwcGxpZWQgKGFuZCB0aHVzIHdpdGggNC4xOCkgSSBnZXQgcmFu ZG9tCj4+Pj4+IGlsbGVnYWwgaW5zdHJ1Y3Rpb24gd2FybmluZ3MgZnJvbSAzMmJpdCBjb2RlIGlu c2lkZSBWTXMuIEkgZG8gbm90IGtub3cKPj4+Pj4gYXQgdGhpcyBwb2ludCB3aGV0aGVyIHRoaXMg YWZmZWN0cyBvdGhlciBDUFVzIGFzIHdlbGwuCj4+Pj4gQ2FuIHlvdSBwbGVhc2UgZ2l2ZSBhIGZl dyBtb3JlIGRldGFpbHM/Cj4+Pj4KPj4+PiAtIHdoYXQgYXJlIHRoZSBDUFVzIG9uIHRoaXMgSGkx NjE2PyBBdCBsZWFzdCBhIC9wcm9jL2NwdWluZm8gd291bGQgaGVscAo+Pj4gVGhlc2UgYXJlIEE3 MnM6Cj4+Pgo+Pj4gcHJvY2Vzc29ywqDCoMKgIDogMAo+Pj4gQm9nb01JUFPCoMKgwqAgOiAxMDAu MDAKPj4+IEZlYXR1cmVzwqDCoMKgIDogZnAgYXNpbWQgZXZ0c3RybSBhZXMgcG11bGwgc2hhMSBz aGEyIGNyYzMyIGNwdWlkCj4+PiBDUFUgaW1wbGVtZW50ZXLCoMKgwqAgOiAweDQxCj4+PiBDUFUg YXJjaGl0ZWN0dXJlOiA4Cj4+PiBDUFUgdmFyaWFudMKgwqDCoCA6IDB4MAo+Pj4gQ1BVIHBhcnTC oMKgwqAgOiAweGQwOAo+Pj4gQ1BVIHJldmlzaW9uwqDCoMKgIDogMgo+Pj4KPj4+PiAtIGFuIGV4 YW1wbGUgb2YgdGhlIGNyYXNoPyBJcyBpdCB3aXRoaW4gdGhlIGRlY29tcHJlc3Nvcj8gQWZ0ZXI/ IFRoaXMKPj4+PiB0aGluZ3MgZG8gbWF0dGVyLCBnaXZlbiB0aGUgbnVtYmVyIG9mIGNyYXp5IHRo aW5ncyB0aGUgMzJiaXQga2VybmVsIGRvZXMKPj4+IFRoZXkgYXJlIGFsd2F5cyBpbiB1c2VyIHNw YWNlLiBNeSBjdXJyZW50IHJlcHJvZHVjZXIgaXMgdGhpczoKPj4+Cj4+PiAgIMKgICQgd2hpbGUg cnBtIC1xYSA+IC9kZXYvbnVsbDsgZG8gOjsgZG9uZQo+Pj4KPj4+IElmIEkgcnVuIHRoaXMgaW4g cGFyYWxsZWwgd2l0aCBzb21ldGhpbmcgdGhhdCBqdXN0IHBvcHVsYXRlcyBSQU0gKGRkCj4+PiBp Zj0vZGV2L252bWUwbjEgb2Y9L2Rldi9udWxsIGJzPTEwRykgSSBnZXQgYW4gaWxsZWdhbCBpbnN0 cnVjdGlvbiBmYXVsdAo+Pj4gd2l0aGluIHNlY29uZHM6Cj4+Pgo+Pj4gc2gtNC40IyB3aGlsZSBy cG0gLXFhID4gL2Rldi9udWxsOyBkbyB0cnVlOyBkb25lCj4+PiBJbGxlZ2FsIGluc3RydWN0aW9u IChjb3JlIGR1bXBlZCkKPj4+Cj4+Pgo+Pj4+IC0gYSBob3N0IGtlcm5lbCBjb25maWd1cmF0aW9u Pwo+Pj4gSG9zdCBrZXJuZWwgY29uZmlndXJhdGlvbiBpcyBqdXN0IHRoZSBub3JtYWwgb3BlblNV U0Ugb25lOgo+Pj4KPj4+IGh0dHBzOi8va2VybmVsLm9wZW5zdXNlLm9yZy9jZ2l0L2tlcm5lbC1z b3VyY2UvcGxhaW4vY29uZmlnL2FybTY0L2RlZmF1bHQ/aD1zdGFibGUKPj4+Cj4+Pj4+IElmIGFu eW9uZSBpcyBpbnRlcmVzdGVkIGluIGEgcmVwcm9kdWNlciwgSSBoYXZlIHNvbWV0aGluZyBoYW5k eS4gQnV0IGZvcgo+Pj4+PiBub3cgSSBiZWxpZXZlIHdlIHNob3VsZCBqdXN0IHJldmVydCB0aGlz IHBhdGNoLgo+Pj4+IEJlZm9yZSB3ZSByZXZlcnQgYW55dGhpbmcsIEknZCBsaWtlIHRvIHVuZGVy c3RhbmQgd2hhdCBpcyBoYXBwZW5pbmcuCj4+PiBZZWFoLCBJIGRpZG4ndCByZWFsaXplIHRoZSBj b21taXQgaXMgYWxyZWFkeSBpbiBzaW5jZSA0LjE2LCBzbyBJIGFncmVlLgo+Pj4gSSdsbCBiaXNl Y3QgYSBiaXQsIGJ1dCBpdCBtYXkgdGFrZSBhIHdoaWxlLgo+PiBEbyB5b3UgbWluZCBnaXZpbmcg dGhpcyBhIHRyeT8KPj4KPj4gZGlmZiAtLWdpdCBhL3ZpcnQva3ZtL2FybS9tbXUuYyBiL3ZpcnQv a3ZtL2FybS9tbXUuYwo+PiBpbmRleCAxZDkwZDc5NzA2YmQuLmRmOGYzZDVlYWEyMiAxMDA2NDQK Pj4gLS0tIGEvdmlydC9rdm0vYXJtL21tdS5jCj4+ICsrKyBiL3ZpcnQva3ZtL2FybS9tbXUuYwo+ PiBAQCAtMTUzMSw3ICsxNTM2LDcgQEAgc3RhdGljIGludCB1c2VyX21lbV9hYm9ydChzdHJ1Y3Qg a3ZtX3ZjcHUgKnZjcHUsIHBoeXNfYWRkcl90IGZhdWx0X2lwYSwKPj4gICAJCQlrdm1fc2V0X3Bm bl9kaXJ0eShwZm4pOwo+PiAgIAkJfQo+PiAgIAo+PiAtCQlpZiAoZmF1bHRfc3RhdHVzICE9IEZT Q19QRVJNKQo+PiArCQlpZiAoZmF1bHRfc3RhdHVzICE9IEZTQ19QRVJNIHx8IHdyaXRlX2ZhdWx0 KQo+PiAgIAkJCWNsZWFuX2RjYWNoZV9ndWVzdF9wYWdlKHBmbiwgUE1EX1NJWkUpOwo+PiAgIAo+ PiAgIAkJaWYgKGV4ZWNfZmF1bHQpIHsKPj4gQEAgLTE1NTMsNyArMTU1OCw3IEBAIHN0YXRpYyBp bnQgdXNlcl9tZW1fYWJvcnQoc3RydWN0IGt2bV92Y3B1ICp2Y3B1LCBwaHlzX2FkZHJfdCBmYXVs dF9pcGEsCj4+ICAgCQkJbWFya19wYWdlX2RpcnR5KGt2bSwgZ2ZuKTsKPj4gICAJCX0KPj4gICAK Pj4gLQkJaWYgKGZhdWx0X3N0YXR1cyAhPSBGU0NfUEVSTSkKPj4gKwkJaWYgKGZhdWx0X3N0YXR1 cyAhPSBGU0NfUEVSTSB8fCB3cml0ZV9mYXVsdCkKPj4gICAJCQljbGVhbl9kY2FjaGVfZ3Vlc3Rf cGFnZShwZm4sIFBBR0VfU0laRSk7Cj4+ICAgCj4+ICAgCQlpZiAoZXhlY19mYXVsdCkgewo+Pgo+ Pgo+PiBUaGUgbWlzc2luZyBsb2dpYyBpcyB0aGF0IGEgd3JpdGUgZnJvbSB0aGUgZ3Vlc3QgY291 bGQgaGF2ZSB0cmlnZ2VyZWQKPj4gYSBDb1csIG1lYW5pbmcgd2UgZGVmaW5pdGVseSBuZWVkIHRv IGZsdXNoIGl0IGluIHRoYXQgY2FzZSB0b28uIEl0Cj4+IGZpeGVzIGEga3ZtLXVuaXQtdGVzdCBy ZWdyZXNzaW9uIGhlcmUuCj4gCj4gVGhpcyBwYXRjaCB1bmZvcnR1bmF0ZWx5IGRvZXMgbm90IGZp eCB0aGUgaXNzdWUuIEkgc3RpbGwgc2VlIGlsbGVnYWwgCj4gaW5zdHJ1Y3Rpb25zLgoKWytEYXZl XQoKVGhhdCdzIGJlY2F1c2Ugd2hhdCB5b3UncmUgb2JzZXJ2aW5nIGhhcyBub3RoaW5nIHRvIGRv IHdpdGggY2FjaGluZywgYnV0IAp3aXRoIEZQL1NJTUQgdHJhcHBpbmcgaW5zdGVhZC4gVGhhbmtz IHRvIHRoZSBndWVzdCBpbWFnZSB5b3UndmUgcHJvdmlkZWQsCkkndmUgYmVlbiBhYmxlIHRvIGV4 dHJhY3QgdGhlIGZvbGxvd2luZzoKClsgICAgMy45NDQyNzNdIHN5c3RlbWQtdWRldmQgKDI2Nik6 IHVuZGVmaW5lZCBpbnN0cnVjdGlvbjogcGM9KHB0cnZhbCkKWyAgICAzLjk0NTM5Nl0gQ1BVOiAw IFBJRDogMjY2IENvbW06IHN5c3RlbWQtdWRldmQgTm90IHRhaW50ZWQgNC4xNy4xNC0yLWxwYWUg IzEgb3BlblNVU0UgVHVtYmxld2VlZCAodW5yZWxlYXNlZCkKWyAgICAzLjk0NzEzMF0gSGFyZHdh cmUgbmFtZTogR2VuZXJpYyBEVCBiYXNlZCBzeXN0ZW0KWyAgICAzLjk0Nzk3Nl0gUEMgaXMgYXQg MHhiNmI5Mzk3YQpbICAgIDMuOTQ4NTQ3XSBMUiBpcyBhdCAweGI2ZTlhMWIwClsgICAgMy45NTgy OTFdIHBjIDogWzxiNmI5Mzk3YT5dICAgIGxyIDogWzxiNmU5YTFiMD5dICAgIHBzcjogMjAwNzAw MzAKWyAgICAzLjk1OTY2NF0gc3AgOiBiZWJlMzZhMCAgaXAgOiBiNmY2YWQ1MCAgZnAgOiAwMDVl ODc4NApbICAgIDMuOTYwNjAxXSByMTA6IGJlYmUzODE0ICByOSA6IGJlYmUzNmMwICByOCA6IGJl YmUzNmJjClsgICAgMy45NjE1MjJdIHI3IDogYmViZTM4MTQgIHI2IDogMDAwMDAwNzQgIHI1IDog MDAwMDAwMDAgIHI0IDogMDAwMDAwMDAKWyAgICAzLjk2MjY2MV0gcjMgOiAwMDVmMmI2MCAgcjIg OiAwMDAwMDA3NCAgcjEgOiAwMDAwMDAwMCAgcjAgOiBiZWJlMzgxNApbICAgIDMuOTYzODAxXSBG bGFnczogbnpDdiAgSVJRcyBvbiAgRklRcyBvbiAgTW9kZSBVU0VSXzMyICBJU0EgVGh1bWIgIFNl Z21lbnQgdXNlcgpbICAgIDQuMDAwNjA2XSBDb250cm9sOiAzMGM1MzgzZCAgVGFibGU6IDZhOGU3 NDAwICBEQUM6IGZmZmZmZmZkClsgICAgNC4wMDE2NTldIENvZGU6IGQxZjkgZjFhMCAwMDAxIDQ3 NzAgKGVlZTApIDFiMTAgCgptYXpAZmxha2VzOn4vYXJtdjctYnVpbGQtZmFpbCQgKGVjaG8gLnRo dW1iOyBlY2hvIC5pbnN0LncgMHhlZWUwMWIxMCkgPiB4LlMgJiYgIGFybS1saW51eC1nbnVlYWJp aGYtZ2NjIC1jIHguUyAmJiBhcm0tbGludXgtZ251ZWFiaWhmLW9iamR1bXAgLWQgeC5vCgp4Lm86 ICAgICBmaWxlIGZvcm1hdCBlbGYzMi1saXR0bGVhcm0KCgpEaXNhc3NlbWJseSBvZiBzZWN0aW9u IC50ZXh0OgoKMDAwMDAwMDAgPC50ZXh0PjoKICAgMDoJZWVlMCAxYjEwIAl2ZHVwLjgJcTAsIHIx CgpBIFZGUCBpbnN0cnVjdGlvbi4gR2l2ZW4gdGhhdCB5b3UndmUgcmVwb3J0ZWQgdGhhdCB0aGlu Z3Mgd29ya2VkIGluCjQuMTcgYW5kIGJyb2tlIGluIDQuMTgsIEkgc3Ryb25nbHkgc3VzcGVjdCB0 aGUgbmV3IGxhenkgRlBTSU1EIGNvZGUuClVwb24gaW5zcGVjdGlvbiwgdGhlIHdheSB3ZSBzZXR1 cCB0cmFwcGluZyBmb3IgMzJiaXQgaXMgYSB0aW55IGJpdApzdXNwZWN0LgoKQ291bGQgeW91IHBs ZWFzZSBnaXZlIHRoaXMgcGF0Y2ggYSBnbz8gTXkgU2VhdHRsZSBoYXMgYmVlbiBydW5uaW5nCndp dGggaXQgZm9yIDMwIG1pbnV0ZXMgbm93LCBhbmQgaXQgaXMgc3RpbGwgcnVubmluZyAoaW5zdGVh ZCBvZgpmYWlsaW5nIHdpdGggc2Vjb25kcykuCgpUaGFua3MsCgoJTS4KCkZyb20gZjJkMWQ0M2Uy NDI5ZjkyNjlhYjZjNTY1NDQwZTA5NWFiM2E5YmU4OSBNb24gU2VwIDE3IDAwOjAwOjAwIDIwMDEK RnJvbTogTWFyYyBaeW5naWVyIDxtYXJjLnp5bmdpZXJAYXJtLmNvbT4KRGF0ZTogVGh1LCAyMyBB dWcgMjAxOCAxMTo1MTo0MyArMDEwMApTdWJqZWN0OiBbUEFUQ0hdIGFybTY0OiBLVk06IE9ubHkg Zm9yY2UgRlBFWEMzMl9FTDIuRU4gaWYgdHJhcHBpbmcgRlBTSU1ECgpJZiB0cmFwcGluZyBGUFNJ TUQgaW4gdGhlIGNvbnRleHQgb2YgYW4gQUFyY2gzMiBndWVzdCwgaXQgaXMgY3JpdGljYWwKdG8g c2V0IEZQRVhDMzJfRUwyLkVOIHRvIDEgc28gdGhhdCB0aGUgdHJhcHBpbmcgaXMgdGFrZW4gdG8g RUwyIGFuZApub3QgRUwxLgoKQ29udmVyc2VseSwgaXQgaXMganVzdCBhcyBjcml0aWNhbCAqbm90 KiB0byBzZXQgRlBFWEMzMl9FTDIuRU4gdG8gMQppZiB3ZSdyZSBub3QgZ29pbmcgdG8gdHJhcCBG UFNJTUQsIGFzIHdlIHRoZW4gY29ycnVwdCB0aGUgZXhpc3RpbmcKVkZQIHN0YXRlLgoKTW92aW5n IHRoZSBjYWxsIHRvIF9fYWN0aXZhdGVfdHJhcHNfZnBzaW1kMzIgdG8gdGhlIHBvaW50IHdoZXJl IHdlCmtub3cgZm9yIHN1cmUgdGhhdCB3ZSBhcmUgZ29pbmcgdG8gdHJhcCBlbnN1cmVzIHRoYXQg d2UgZG9uJ3Qgc2V0IHRoYXQKYml0IHNwdXJpb3VzbHkuCgpGaXhlczogZTZiNjczYjc0MWVhICgi S1ZNOiBhcm02NDogT3B0aW1pc2UgRlBTSU1EIGhhbmRsaW5nIHRvIHJlZHVjZSBndWVzdC9ob3N0 IHRocmFzaGluZyIpCkNjOiBEYXZlIE1hcnRpbiA8ZGF2ZS5tYXJ0aW5AYXJtLmNvbT4KUmVwb3J0 ZWQtYnk6IEFsZXhhbmRlciBHcmFmIDxhZ3JhZkBzdXNlLmRlPgpTaWduZWQtb2ZmLWJ5OiBNYXJj IFp5bmdpZXIgPG1hcmMuenluZ2llckBhcm0uY29tPgotLS0KIGFyY2gvYXJtNjQva3ZtL2h5cC9z d2l0Y2guYyB8IDkgKysrKysrLS0tCiAxIGZpbGUgY2hhbmdlZCwgNiBpbnNlcnRpb25zKCspLCAz IGRlbGV0aW9ucygtKQoKZGlmZiAtLWdpdCBhL2FyY2gvYXJtNjQva3ZtL2h5cC9zd2l0Y2guYyBi L2FyY2gvYXJtNjQva3ZtL2h5cC9zd2l0Y2guYwppbmRleCBkNDk2ZWY1Nzk4NTkuLmNhNDYxNTNk NzkxNSAxMDA2NDQKLS0tIGEvYXJjaC9hcm02NC9rdm0vaHlwL3N3aXRjaC5jCisrKyBiL2FyY2gv YXJtNjQva3ZtL2h5cC9zd2l0Y2guYwpAQCAtOTgsOCArOTgsMTAgQEAgc3RhdGljIHZvaWQgYWN0 aXZhdGVfdHJhcHNfdmhlKHN0cnVjdCBrdm1fdmNwdSAqdmNwdSkKIAl2YWwgPSByZWFkX3N5c3Jl ZyhjcGFjcl9lbDEpOwogCXZhbCB8PSBDUEFDUl9FTDFfVFRBOwogCXZhbCAmPSB+Q1BBQ1JfRUwx X1pFTjsKLQlpZiAoIXVwZGF0ZV9mcF9lbmFibGVkKHZjcHUpKQorCWlmICghdXBkYXRlX2ZwX2Vu YWJsZWQodmNwdSkpIHsKIAkJdmFsICY9IH5DUEFDUl9FTDFfRlBFTjsKKwkJX19hY3RpdmF0ZV90 cmFwc19mcHNpbWQzMih2Y3B1KTsKKwl9CiAKIAl3cml0ZV9zeXNyZWcodmFsLCBjcGFjcl9lbDEp OwogCkBAIC0xMTQsOCArMTE2LDEwIEBAIHN0YXRpYyB2b2lkIF9faHlwX3RleHQgX19hY3RpdmF0 ZV90cmFwc19udmhlKHN0cnVjdCBrdm1fdmNwdSAqdmNwdSkKIAogCXZhbCA9IENQVFJfRUwyX0RF RkFVTFQ7CiAJdmFsIHw9IENQVFJfRUwyX1RUQSB8IENQVFJfRUwyX1RaOwotCWlmICghdXBkYXRl X2ZwX2VuYWJsZWQodmNwdSkpCisJaWYgKCF1cGRhdGVfZnBfZW5hYmxlZCh2Y3B1KSkgewogCQl2 YWwgfD0gQ1BUUl9FTDJfVEZQOworCQlfX2FjdGl2YXRlX3RyYXBzX2Zwc2ltZDMyKHZjcHUpOwor CX0KIAogCXdyaXRlX3N5c3JlZyh2YWwsIGNwdHJfZWwyKTsKIH0KQEAgLTEyOSw3ICsxMzMsNiBA QCBzdGF0aWMgdm9pZCBfX2h5cF90ZXh0IF9fYWN0aXZhdGVfdHJhcHMoc3RydWN0IGt2bV92Y3B1 ICp2Y3B1KQogCWlmIChjcHVzX2hhdmVfY29uc3RfY2FwKEFSTTY0X0hBU19SQVNfRVhUTikgJiYg KGhjciAmIEhDUl9WU0UpKQogCQl3cml0ZV9zeXNyZWdfcyh2Y3B1LT5hcmNoLnZzZXNyX2VsMiwg U1lTX1ZTRVNSX0VMMik7CiAKLQlfX2FjdGl2YXRlX3RyYXBzX2Zwc2ltZDMyKHZjcHUpOwogCWlm IChoYXNfdmhlKCkpCiAJCWFjdGl2YXRlX3RyYXBzX3ZoZSh2Y3B1KTsKIAllbHNlCi0tIAoyLjE4 LjAKCgotLSAKSmF6eiBpcyBub3QgZGVhZC4gSXQganVzdCBzbWVsbHMgZnVubnkuLi4KX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18Ka3ZtYXJtIG1haWxpbmcg bGlzdAprdm1hcm1AbGlzdHMuY3MuY29sdW1iaWEuZWR1Cmh0dHBzOi8vbGlzdHMuY3MuY29sdW1i aWEuZWR1L21haWxtYW4vbGlzdGluZm8va3ZtYXJtCg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: marc.zyngier@arm.com (Marc Zyngier) Date: Thu, 23 Aug 2018 12:16:48 +0100 Subject: [PATCH v3 7/9] KVM: arm/arm64: Only clean the dcache on translation fault In-Reply-To: References: <20171023161122.15291-1-marc.zyngier@arm.com> <20171023161122.15291-8-marc.zyngier@arm.com> <9fa7efdf-1c21-7b07-edb9-0c7d0d91eaed@arm.com> <2686ddfc-935a-18e0-46bd-0cb608ae44e1@suse.de> <4d1c7d3b-4abe-fa8d-31ac-7a98ec349db1@arm.com> Message-ID: <1f59ea80-a88e-e09d-bb55-cd1a514bc957@arm.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 21/08/18 17:54, Alexander Graf wrote: > On 08/21/2018 05:08 PM, Marc Zyngier wrote: >> On 21/08/18 15:08, Alexander Graf wrote: >>> On 08/21/2018 03:57 PM, Marc Zyngier wrote: >>>> On 21/08/18 14:35, Alexander Graf wrote: >>>>> On 10/23/2017 06:11 PM, Marc Zyngier wrote: >>>>>> The only case where we actually need to perform a dcache maintenance >>>>>> is when we map the page for the first time, and subsequent permission >>>>>> faults do not require cache maintenance. Let's make it conditional >>>>>> on not being a permission fault (and thus a translation fault). >>>>>> >>>>>> Reviewed-by: Christoffer Dall >>>>>> Signed-off-by: Marc Zyngier >>>>> This patch unfortunately breaks something on Hi1616 SoCs when running >>>>> 32bit guests. With this patch applied (and thus with 4.18) I get random >>>>> illegal instruction warnings from 32bit code inside VMs. I do not know >>>>> at this point whether this affects other CPUs as well. >>>> Can you please give a few more details? >>>> >>>> - what are the CPUs on this Hi1616? At least a /proc/cpuinfo would help >>> These are A72s: >>> >>> processor??? : 0 >>> BogoMIPS??? : 100.00 >>> Features??? : fp asimd evtstrm aes pmull sha1 sha2 crc32 cpuid >>> CPU implementer??? : 0x41 >>> CPU architecture: 8 >>> CPU variant??? : 0x0 >>> CPU part??? : 0xd08 >>> CPU revision??? : 2 >>> >>>> - an example of the crash? Is it within the decompressor? After? This >>>> things do matter, given the number of crazy things the 32bit kernel does >>> They are always in user space. My current reproducer is this: >>> >>> ? $ while rpm -qa > /dev/null; do :; done >>> >>> If I run this in parallel with something that just populates RAM (dd >>> if=/dev/nvme0n1 of=/dev/null bs=10G) I get an illegal instruction fault >>> within seconds: >>> >>> sh-4.4# while rpm -qa > /dev/null; do true; done >>> Illegal instruction (core dumped) >>> >>> >>>> - a host kernel configuration? >>> Host kernel configuration is just the normal openSUSE one: >>> >>> https://kernel.opensuse.org/cgit/kernel-source/plain/config/arm64/default?h=stable >>> >>>>> If anyone is interested in a reproducer, I have something handy. But for >>>>> now I believe we should just revert this patch. >>>> Before we revert anything, I'd like to understand what is happening. >>> Yeah, I didn't realize the commit is already in since 4.16, so I agree. >>> I'll bisect a bit, but it may take a while. >> Do you mind giving this a try? >> >> diff --git a/virt/kvm/arm/mmu.c b/virt/kvm/arm/mmu.c >> index 1d90d79706bd..df8f3d5eaa22 100644 >> --- a/virt/kvm/arm/mmu.c >> +++ b/virt/kvm/arm/mmu.c >> @@ -1531,7 +1536,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, >> kvm_set_pfn_dirty(pfn); >> } >> >> - if (fault_status != FSC_PERM) >> + if (fault_status != FSC_PERM || write_fault) >> clean_dcache_guest_page(pfn, PMD_SIZE); >> >> if (exec_fault) { >> @@ -1553,7 +1558,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, >> mark_page_dirty(kvm, gfn); >> } >> >> - if (fault_status != FSC_PERM) >> + if (fault_status != FSC_PERM || write_fault) >> clean_dcache_guest_page(pfn, PAGE_SIZE); >> >> if (exec_fault) { >> >> >> The missing logic is that a write from the guest could have triggered >> a CoW, meaning we definitely need to flush it in that case too. It >> fixes a kvm-unit-test regression here. > > This patch unfortunately does not fix the issue. I still see illegal > instructions. [+Dave] That's because what you're observing has nothing to do with caching, but with FP/SIMD trapping instead. Thanks to the guest image you've provided, I've been able to extract the following: [ 3.944273] systemd-udevd (266): undefined instruction: pc=(ptrval) [ 3.945396] CPU: 0 PID: 266 Comm: systemd-udevd Not tainted 4.17.14-2-lpae #1 openSUSE Tumbleweed (unreleased) [ 3.947130] Hardware name: Generic DT based system [ 3.947976] PC is at 0xb6b9397a [ 3.948547] LR is at 0xb6e9a1b0 [ 3.958291] pc : [] lr : [] psr: 20070030 [ 3.959664] sp : bebe36a0 ip : b6f6ad50 fp : 005e8784 [ 3.960601] r10: bebe3814 r9 : bebe36c0 r8 : bebe36bc [ 3.961522] r7 : bebe3814 r6 : 00000074 r5 : 00000000 r4 : 00000000 [ 3.962661] r3 : 005f2b60 r2 : 00000074 r1 : 00000000 r0 : bebe3814 [ 3.963801] Flags: nzCv IRQs on FIQs on Mode USER_32 ISA Thumb Segment user [ 4.000606] Control: 30c5383d Table: 6a8e7400 DAC: fffffffd [ 4.001659] Code: d1f9 f1a0 0001 4770 (eee0) 1b10 maz at flakes:~/armv7-build-fail$ (echo .thumb; echo .inst.w 0xeee01b10) > x.S && arm-linux-gnueabihf-gcc -c x.S && arm-linux-gnueabihf-objdump -d x.o x.o: file format elf32-littlearm Disassembly of section .text: 00000000 <.text>: 0: eee0 1b10 vdup.8 q0, r1 A VFP instruction. Given that you've reported that things worked in 4.17 and broke in 4.18, I strongly suspect the new lazy FPSIMD code. Upon inspection, the way we setup trapping for 32bit is a tiny bit suspect. Could you please give this patch a go? My Seattle has been running with it for 30 minutes now, and it is still running (instead of failing with seconds). Thanks, M. >>From f2d1d43e2429f9269ab6c565440e095ab3a9be89 Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Thu, 23 Aug 2018 11:51:43 +0100 Subject: [PATCH] arm64: KVM: Only force FPEXC32_EL2.EN if trapping FPSIMD If trapping FPSIMD in the context of an AArch32 guest, it is critical to set FPEXC32_EL2.EN to 1 so that the trapping is taken to EL2 and not EL1. Conversely, it is just as critical *not* to set FPEXC32_EL2.EN to 1 if we're not going to trap FPSIMD, as we then corrupt the existing VFP state. Moving the call to __activate_traps_fpsimd32 to the point where we know for sure that we are going to trap ensures that we don't set that bit spuriously. Fixes: e6b673b741ea ("KVM: arm64: Optimise FPSIMD handling to reduce guest/host thrashing") Cc: Dave Martin Reported-by: Alexander Graf Signed-off-by: Marc Zyngier --- arch/arm64/kvm/hyp/switch.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c index d496ef579859..ca46153d7915 100644 --- a/arch/arm64/kvm/hyp/switch.c +++ b/arch/arm64/kvm/hyp/switch.c @@ -98,8 +98,10 @@ static void activate_traps_vhe(struct kvm_vcpu *vcpu) val = read_sysreg(cpacr_el1); val |= CPACR_EL1_TTA; val &= ~CPACR_EL1_ZEN; - if (!update_fp_enabled(vcpu)) + if (!update_fp_enabled(vcpu)) { val &= ~CPACR_EL1_FPEN; + __activate_traps_fpsimd32(vcpu); + } write_sysreg(val, cpacr_el1); @@ -114,8 +116,10 @@ static void __hyp_text __activate_traps_nvhe(struct kvm_vcpu *vcpu) val = CPTR_EL2_DEFAULT; val |= CPTR_EL2_TTA | CPTR_EL2_TZ; - if (!update_fp_enabled(vcpu)) + if (!update_fp_enabled(vcpu)) { val |= CPTR_EL2_TFP; + __activate_traps_fpsimd32(vcpu); + } write_sysreg(val, cptr_el2); } @@ -129,7 +133,6 @@ static void __hyp_text __activate_traps(struct kvm_vcpu *vcpu) if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN) && (hcr & HCR_VSE)) write_sysreg_s(vcpu->arch.vsesr_el2, SYS_VSESR_EL2); - __activate_traps_fpsimd32(vcpu); if (has_vhe()) activate_traps_vhe(vcpu); else -- 2.18.0 -- Jazz is not dead. It just smells funny...