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Wed, 15 May 2024 06:17:32 -0700 (PDT) Received: from localhost ([2a01:e0a:3c5:5fb1:2893:1a8f:5988:776a]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3502bbbbefdsm16424209f8f.94.2024.05.15.06.17.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 May 2024 06:17:32 -0700 (PDT) References: <20240510090933.19464-1-ddrokosov@salutedevices.com> <20240510090933.19464-3-ddrokosov@salutedevices.com> <20240511-secret-barcode-e25c722ddf1d@spud> <20240513091735.l3uewwzfrdd6qwbl@CAB-WSD-L081021> <20240513-epic-magnifier-8dd83db81c4c@spud> <20240513183012.652mwhivasqihiqc@CAB-WSD-L081021> User-agent: mu4e 1.10.8; emacs 29.2 From: Jerome Brunet To: Dmitry Rokosov Cc: Conor Dooley , neil.armstrong@linaro.org, jbrunet@baylibre.com, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, khilman@baylibre.com, martin.blumenstingl@googlemail.com, jian.hu@amlogic.com, kernel@sberdevices.ru, rockosov@gmail.com, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 2/7] dt-bindings: clock: meson: a1: pll: introduce new syspll bindings Date: Wed, 15 May 2024 15:15:35 +0200 In-reply-to: <20240513183012.652mwhivasqihiqc@CAB-WSD-L081021> Message-ID: <1jh6ezxlhw.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240515_061734_828048_6FB99B18 X-CRM114-Status: GOOD ( 23.07 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org On Mon 13 May 2024 at 21:30, Dmitry Rokosov wrote: > On Mon, May 13, 2024 at 04:48:33PM +0100, Conor Dooley wrote: >> On Mon, May 13, 2024 at 12:18:02PM +0300, Dmitry Rokosov wrote: >> > Hello Conor, >> > >> > Thank you for quick review! >> > >> > On Sat, May 11, 2024 at 02:08:03PM +0100, Conor Dooley wrote: >> > > On Fri, May 10, 2024 at 12:08:54PM +0300, Dmitry Rokosov wrote: >> > > > The 'syspll' PLL is a general-purpose PLL designed specifically for the >> > > > CPU clock. It is capable of producing output frequencies within the >> > > > range of 768MHz to 1536MHz. >> > > > >> > > > The clock source sys_pll_div16, being one of the GEN clock parents, >> > > > plays a crucial role and cannot be tagged as "optional". Unfortunately, >> > > > it was not implemented earlier due to the cpu clock ctrl driver's >> > > > pending status on the TODO list. >> > > >> > > It's fine to not mark it optional in the binding, but it should be >> > > optional in the driver as otherwise backwards compatibility will be >> > > broken. Given this is an integral clock driver, sounds like it would >> > > quite likely break booting on these devices if the driver doesn't treat >> > > syspll_in as optional. >> > > A lesson perhaps in describing the hardware entirely, even if the >> > > drivers don't make use of all the information yet? >> > >> > Yes, it's definitely the right lesson for me. However, without syspll or >> > syspll_in, we cannot utilize CPU power management at all. >> >> That's the status-quo, right? The incorrect dts would continue to not >> support CPU power management and the new one with the correct description >> would? > > Hmmm, correct. Okay, I see, I will support sys_pll as optional > connection :) Again, the way controller is written, all inputs are actually optional. The controller does not error out if an input is missing, it behave as if the input is disconnected -- Jerome _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f44.google.com (mail-wr1-f44.google.com [209.85.221.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A54DA127E12 for ; Wed, 15 May 2024 13:17:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.44 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715779056; cv=none; b=RmnsXMrOQXbhgE7jyCb0Zz49DkmK4fGeVUZMNaGifbJ3QFt9IubQWJwsD1CXnoyGfVFNv8++v9z12DYjL1cgKSwUz/kgBsorLErDpWOxQwxuTWk1bSYn/w3hCqk0C6DLYNIvBoCeVE6rcD5fw1kBI8I+8ua5IVSJZS5lWoop0Ss= ARC-Message-Signature:i=1; a=rsa-sha256; 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Wed, 15 May 2024 06:17:32 -0700 (PDT) References: <20240510090933.19464-1-ddrokosov@salutedevices.com> <20240510090933.19464-3-ddrokosov@salutedevices.com> <20240511-secret-barcode-e25c722ddf1d@spud> <20240513091735.l3uewwzfrdd6qwbl@CAB-WSD-L081021> <20240513-epic-magnifier-8dd83db81c4c@spud> <20240513183012.652mwhivasqihiqc@CAB-WSD-L081021> User-agent: mu4e 1.10.8; emacs 29.2 From: Jerome Brunet To: Dmitry Rokosov Cc: Conor Dooley , neil.armstrong@linaro.org, jbrunet@baylibre.com, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, khilman@baylibre.com, martin.blumenstingl@googlemail.com, jian.hu@amlogic.com, kernel@sberdevices.ru, rockosov@gmail.com, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 2/7] dt-bindings: clock: meson: a1: pll: introduce new syspll bindings Date: Wed, 15 May 2024 15:15:35 +0200 In-reply-to: <20240513183012.652mwhivasqihiqc@CAB-WSD-L081021> Message-ID: <1jh6ezxlhw.fsf@starbuckisacylon.baylibre.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain On Mon 13 May 2024 at 21:30, Dmitry Rokosov wrote: > On Mon, May 13, 2024 at 04:48:33PM +0100, Conor Dooley wrote: >> On Mon, May 13, 2024 at 12:18:02PM +0300, Dmitry Rokosov wrote: >> > Hello Conor, >> > >> > Thank you for quick review! >> > >> > On Sat, May 11, 2024 at 02:08:03PM +0100, Conor Dooley wrote: >> > > On Fri, May 10, 2024 at 12:08:54PM +0300, Dmitry Rokosov wrote: >> > > > The 'syspll' PLL is a general-purpose PLL designed specifically for the >> > > > CPU clock. It is capable of producing output frequencies within the >> > > > range of 768MHz to 1536MHz. >> > > > >> > > > The clock source sys_pll_div16, being one of the GEN clock parents, >> > > > plays a crucial role and cannot be tagged as "optional". Unfortunately, >> > > > it was not implemented earlier due to the cpu clock ctrl driver's >> > > > pending status on the TODO list. >> > > >> > > It's fine to not mark it optional in the binding, but it should be >> > > optional in the driver as otherwise backwards compatibility will be >> > > broken. Given this is an integral clock driver, sounds like it would >> > > quite likely break booting on these devices if the driver doesn't treat >> > > syspll_in as optional. >> > > A lesson perhaps in describing the hardware entirely, even if the >> > > drivers don't make use of all the information yet? >> > >> > Yes, it's definitely the right lesson for me. However, without syspll or >> > syspll_in, we cannot utilize CPU power management at all. >> >> That's the status-quo, right? The incorrect dts would continue to not >> support CPU power management and the new one with the correct description >> would? > > Hmmm, correct. Okay, I see, I will support sys_pll as optional > connection :) Again, the way controller is written, all inputs are actually optional. The controller does not error out if an input is missing, it behave as if the input is disconnected -- Jerome From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3A093C25B79 for ; Wed, 15 May 2024 13:17:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:In-reply-to: Date:Subject:Cc:To:From:References:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jsZrkWAJKDyPU+bPdszXiRZ6CWxRKPi3tsnSWphiwpQ=; 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emacs 29.2 From: Jerome Brunet To: Dmitry Rokosov Cc: Conor Dooley , neil.armstrong@linaro.org, jbrunet@baylibre.com, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, khilman@baylibre.com, martin.blumenstingl@googlemail.com, jian.hu@amlogic.com, kernel@sberdevices.ru, rockosov@gmail.com, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 2/7] dt-bindings: clock: meson: a1: pll: introduce new syspll bindings Date: Wed, 15 May 2024 15:15:35 +0200 In-reply-to: <20240513183012.652mwhivasqihiqc@CAB-WSD-L081021> Message-ID: <1jh6ezxlhw.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240515_061734_903165_04E53465 X-CRM114-Status: GOOD ( 24.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon 13 May 2024 at 21:30, Dmitry Rokosov wrote: > On Mon, May 13, 2024 at 04:48:33PM +0100, Conor Dooley wrote: >> On Mon, May 13, 2024 at 12:18:02PM +0300, Dmitry Rokosov wrote: >> > Hello Conor, >> > >> > Thank you for quick review! >> > >> > On Sat, May 11, 2024 at 02:08:03PM +0100, Conor Dooley wrote: >> > > On Fri, May 10, 2024 at 12:08:54PM +0300, Dmitry Rokosov wrote: >> > > > The 'syspll' PLL is a general-purpose PLL designed specifically for the >> > > > CPU clock. It is capable of producing output frequencies within the >> > > > range of 768MHz to 1536MHz. >> > > > >> > > > The clock source sys_pll_div16, being one of the GEN clock parents, >> > > > plays a crucial role and cannot be tagged as "optional". Unfortunately, >> > > > it was not implemented earlier due to the cpu clock ctrl driver's >> > > > pending status on the TODO list. >> > > >> > > It's fine to not mark it optional in the binding, but it should be >> > > optional in the driver as otherwise backwards compatibility will be >> > > broken. Given this is an integral clock driver, sounds like it would >> > > quite likely break booting on these devices if the driver doesn't treat >> > > syspll_in as optional. >> > > A lesson perhaps in describing the hardware entirely, even if the >> > > drivers don't make use of all the information yet? >> > >> > Yes, it's definitely the right lesson for me. However, without syspll or >> > syspll_in, we cannot utilize CPU power management at all. >> >> That's the status-quo, right? The incorrect dts would continue to not >> support CPU power management and the new one with the correct description >> would? > > Hmmm, correct. Okay, I see, I will support sys_pll as optional > connection :) Again, the way controller is written, all inputs are actually optional. The controller does not error out if an input is missing, it behave as if the input is disconnected -- Jerome _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel