From: Jesse Barnes <jbarnes@sgi.com>
To: Anton Blanchard <anton@samba.org>
Cc: linux-kernel@vger.kernel.org
Subject: Re: memory-mapped i/o barrier
Date: Mon, 14 Jan 2002 17:02:25 -0800 [thread overview]
Message-ID: <20020114170225.A800421@sgi.com> (raw)
In-Reply-To: <20020110134859.A729245@sgi.com> <20020114062454.GA18794@krispykreme>
In-Reply-To: <20020114062454.GA18794@krispykreme>
On Mon, Jan 14, 2002 at 05:24:54PM +1100, Anton Blanchard wrote:
> Can loads/stores also complete out of order to IO? (the example just shows
> a store from one cpu passing one from another cpu)
I'm not sure what you mean, do you have an example?
> On ppc32/ppc64 this can happen, it is fixed up in the low level pci
> routines. Is there a case where you cant wrap it up in the low level
> routines like ppc32/ppc64?
You mean in each outX routine you essentially do an mmiob()?
Jesse
prev parent reply other threads:[~2002-01-15 1:06 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-01-10 21:48 memory-mapped i/o barrier Jesse Barnes
2002-01-10 23:05 ` Alan Cox
2002-01-10 22:59 ` Jesse Barnes
2002-01-14 6:24 ` Anton Blanchard
2002-01-15 1:02 ` Jesse Barnes [this message]
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