From: Tim Kay <timk@advfn.com>
To: linux-kernel@vger.kernel.org
Subject: Re: how to balance interrupts between 2 CPUs?
Date: Wed, 10 Apr 2002 15:06:50 +0100 [thread overview]
Message-ID: <200204101404.g3AE4bs30567@mail.advfn.com> (raw)
In-Reply-To: <b5926afe75.afe75b5926@water.pku.edu.cn>
Using a poweredge XXXXX with apic enabled (the default) will give you CPU
interrupt sharing:
CPU0 CPU1
0: 34977278 34950769 IO-APIC-edge timer
1: 1 1 IO-APIC-edge keyboard
2: 0 0 XT-PIC cascade
14: 5 1 IO-APIC-edge ide0
16: 149330778 149335816 IO-APIC-level eth0
30: 2975700 2977038 IO-APIC-level aic7xxx
31: 7 9 IO-APIC-level aic7xxx
NMI: 0 0
LOC: 69933245 69933202
ERR: 0
MIS: 0
but /var/log/messages will overflow with APIC errors and your machine will
eventually (in my exp) die as it stops answering the interrupt requests so
you should stick to append="noapic" in your lilo.conf or whatever. The above
is happening to us on PE 1550s 2450s & 6400s anyway. I believe <DUCKS> that,
unless you are running single CPU hogging apps on a one per processor basis,
you dont lose a great deal with one processor dealing with the IRQs and the
other(s) running the software.
Tim
On Wednesday 10 Apr 2002 13:23, zxj@water.pku.edu.cn wrote:
> Hello
>
> I am using two Intel Giga NICs in a DELL PowerEdge 4600
> with 2 Intel XEON 1.8GHz CPUs.
> The matherboard is ServerWorks GC-HE.
> The OS is RedHat 7.2, and the release of kernel is "2.4.7-10smp".
>
> The CPU0 has very heavy interrupt traffic,
> you can see the following information:
>
> [root@giga root]# cat /proc/interrupts
> CPU0 CPU1
> 0: 395117 0 IO-APIC-edge timer
> 1: 653 0 IO-APIC-edge keyboard
> 2: 0 0 XT-PIC cascade
> 8: 1 0 IO-APIC-edge rtc
> 12: 23 0 IO-APIC-edge PS/2 Mouse
> 14: 2 0 IO-APIC-edge ide0
> 18: 30 0 IO-APIC-level aic7xxx
> 19: 86013 0 IO-APIC-level eth0
> 20: 10394 0 IO-APIC-level aic7xxx
> 21: 30 0 IO-APIC-level aic7xxx
> 27: 5480873 0 IO-APIC-level e1000
> 39: 164889152 0 IO-APIC-level e1000
> NMI: 0 0
> LOC: 395013 395012
> ERR: 0
> MIS: 0
>
>
> The kernel's SMP option is enable, but the CPU1 is always idle.
> How to balance the interrpupts between two CPUs?
> If you are convenient, please give me some advice quickly.
>
> Thank you!
>
> Best regard
>
>
> -
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--
----------------
Tim Kay
systems administrator
Advfn.com Plc - http://www.advfn.com/
timk@advfn.com
Tel: 020 7070 0941
Fax: 020 7070 0959
next prev parent reply other threads:[~2002-04-10 14:04 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <b5926afe75.afe75b5926@water.pku.edu.cn>
2002-04-10 12:54 ` how to balance interrupts between 2 CPUs? Philippe Amelant
2002-04-10 13:21 ` lm0re
2002-04-10 14:06 ` Tim Kay [this message]
2002-04-10 14:14 ` Terje Eggestad
2002-04-10 14:31 ` Martin J. Bligh
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