From: Dave Jones <davej@codemonkey.org.uk>
To: Steffen Persvold <sp@scali.com>
Cc: Dave Jones <davej@codemonkey.org.uk>,
Margit Schubert-While <margit@margit.com>,
linux-kernel@vger.kernel.org
Subject: Re: 2.4.20-rc2 strange L1 cache values
Date: Wed, 20 Nov 2002 19:01:12 +0000 [thread overview]
Message-ID: <20021120190112.GC10698@suse.de> (raw)
In-Reply-To: <Pine.LNX.4.44.0211201941290.15336-100000@sp-laptop.isdn.scali.no>
On Wed, Nov 20, 2002 at 07:48:27PM +0100, Steffen Persvold wrote:
> > > <6>CPU: L1 I cache: 0K, L1 D cache: 8K
> Yep that works (I have two Xeon boxes with the same issue) :
> But why does this P4 Trace cache report as L1 I cache on 2.4.18 ?
Look again above, and you'll see .18 said it had 0K L1 (which is
correct, L1 != Trace cache).
> Does this have any implications on the 2.4.18 performance (or the
> 2.4.20-rc2 performance without the descriptors.diff) ?
The SMP weighting should be done with L2 cache size, which
was correct on .18 too, so it should be ok.
Dave
--
| Dave Jones. http://www.codemonkey.org.uk
| SuSE Labs
next prev parent reply other threads:[~2002-11-20 18:56 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2002-11-20 18:05 2.4.20-rc2 strange L1 cache values Margit Schubert-While
2002-11-20 18:13 ` Dave Jones
2002-11-20 18:48 ` Steffen Persvold
2002-11-20 19:01 ` Dave Jones [this message]
2002-11-20 19:23 ` Steffen Persvold
2002-11-20 19:29 ` Dave Jones
-- strict thread matches above, loose matches on Subject: below --
2002-11-20 20:40 Margit Schubert-While
2002-11-20 21:38 ` Dave Jones
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