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Date: Wed, 4 Dec 2002 14:58:23 -0800
From: Jun Sun <jsun@mvista.com>
To: Carsten Langgaard <carstenl@mips.com>
Cc: Daniel Jacobowitz <dan@debian.org>,
	"Kevin D. Kissell" <kevink@mips.com>, linux-mips@linux-mips.org,
	jsun@mvista.com
Subject: Re: possible Malta 4Kc cache problem ...
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In-Reply-To: <3DEE6572.5331C5CD@mips.com>; from carstenl@mips.com on Wed, Dec 04, 2002 at 09:28:34PM +0100
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I guess I still did not answer some of your questions:

On Wed, Dec 04, 2002 at 09:28:34PM +0100, Carsten Langgaard wrote:
> Could you please tell us, which 4Kc you are running on ?

Is the PRID telling enough?  I posted it in the other email.

> What are the cache configuration (size, number of ways) ?
> Are you running on the latest kernel sources from the CVS tree ?

Debugging work is done with my kernel, but confirmed that latest
CVS tree shows the same problem.

> Have you tried the mips32_cache.h file I send and

No, because I don't think it is related to indexed cache operations.

> /or have you tried the kernel
> from the ftp.mips.com FTP server ?
>

Jun