From: Brian Waite <waite@skycomputers.com>
To: Dan Malek <dan@embeddededge.com>,
Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Gary Thomas <gary@mlbassoc.com>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
linuxppc-dev <linuxppc-dev@lists.linuxppc.org>
Subject: Re: Disable cache on 74xx
Date: Thu, 20 Feb 2003 10:47:02 -0500 [thread overview]
Message-ID: <200302201047.02490.waite@skycomputers.com> (raw)
In-Reply-To: <3E54F2EF.2080601@embeddededge.com>
Well to preface, some people around here think disabling cache is a good idea.
I report to one of those :). What I am trying to debug is why my custom board
hangs. Basically, what I see is when a PCI interface starts reading/writing
SDRAM, my 745x processor locks up. I see no more decrementer interrupts being
serviced and using a BDI 2000 JTAG interface I see the processors stalled on
some memory access instruciton. The memory controller (gt64260) seems to be
doing something very wrong and it is thought to be a cache coherency issue.
So to prove this, I was asked to try running without any sort of cache.
Hopefully between Gary's information and yours, Dan I can convince people
that it is futile.
Thanks
Brian
On Thursday 20 February 2003 10:23 am, Dan Malek wrote:
> Geert Uytterhoeven wrote:
> > There may be a different behavior for `disabling the data cache globally'
> > and `using e.g. dcbf on uncached memory' (with the data cache enabled
> > globally).
>
> I decided to take a diversion and read some processor manuals. :-)
>
> The behavior of the cache instructions on areas that are not cacheable
> for any reason depends upon the cache instruction used. Some have
> no effect, some have unpredictable behavior, some cause alignment/access
> traps. It all depends upon how they would translate/access the cache
> and the operation they would perform on a cache line. We use all
> instructions in Linux that would trigger any of the behavior. :-)
>
> The bottom line appears to be you really don't want to execute cache
> instructions on areas that are not cached. This includes global disable
> or any method of marking pages uncached.
>
> For Brian, I'm also curious why you think running Linux with disabled
> caches will assist in debugging memory controller problems? If you are
> looking for such fine control of the bus cycles for debugging it seems a
> simple memory diagnostic used in conjuction with hardware debug tools is a
> better approach.
>
> Thanks.
>
>
> -- Dan
** Sent via the linuxppc-dev mail list. See http://lists.linuxppc.org/
next prev parent reply other threads:[~2003-02-20 15:47 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-02-19 20:52 Disable cache on 74xx Brian Waite
2003-02-19 21:07 ` Benjamin Herrenschmidt
2003-02-19 22:48 ` Gary Thomas
2003-02-20 13:55 ` Brian Waite
2003-02-20 14:01 ` Gary Thomas
2003-02-20 14:09 ` Geert Uytterhoeven
2003-02-20 15:23 ` Dan Malek
2003-02-20 15:47 ` Brian Waite [this message]
2003-02-20 15:54 ` Gary Thomas
2003-02-20 15:55 ` Benjamin Herrenschmidt
2003-02-20 16:14 ` Dan Malek
2003-02-20 16:51 ` Mark A. Greer
2003-02-20 14:09 ` Brian Waite
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