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From: Dave Jones <davej@codemonkey.org.uk>
To: Zwane Mwaikambo <zwane@linuxpower.ca>
Cc: Andi Kleen <ak@suse.de>, Linux Kernel <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH][2.5][RFT] sfence wmb for K7,P3,VIAC3-2(?)
Date: Tue, 1 Apr 2003 17:26:15 +0100	[thread overview]
Message-ID: <20030401162615.GA1131@suse.de> (raw)
In-Reply-To: <Pine.LNX.4.50.0304011105540.8773-100000@montezuma.mastecende.com>

On Tue, Apr 01, 2003 at 11:07:21AM -0500, Zwane Mwaikambo wrote:

 > > Yes, you're correct. It was SSE1, not SSE2.
 > > The problem Zwane encountered is that early Athlons don't support SSE1,
 > > only XP+ do
 > 
 > hmm wouldn't they illegal op? Some tested this on an Athlon 600.

I'm not 100% sure on this, but I *think* 3dnow had an sfence which was
opcode compatable with SSE's instruction.
 
		Dave

  reply	other threads:[~2003-04-01 16:15 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2003-04-01  8:05 [PATCH][2.5][RFT] sfence wmb for K7,P3,VIAC3-2(?) Zwane Mwaikambo
2003-04-01  8:22 ` Zwane Mwaikambo
2003-04-01 10:11   ` Andi Kleen
2003-04-01 11:28     ` Dave Jones
2003-04-01 11:49       ` Andi Kleen
2003-04-01 16:07         ` Zwane Mwaikambo
2003-04-01 16:26           ` Dave Jones [this message]
2003-04-01 18:31             ` Daniel Egger
2003-04-01 23:32               ` Dave Jones

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