From: Dave Jones <davej@codemonkey.org.uk>
To: Andi Kleen <ak@muc.de>
Cc: Arjan van de Ven <arjanv@redhat.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] Runtime memory barrier patching
Date: Tue, 22 Apr 2003 17:11:26 +0100 [thread overview]
Message-ID: <20030422161126.GA13223@suse.de> (raw)
In-Reply-To: <20030422111832.GC2170@averell>
On Tue, Apr 22, 2003 at 01:18:32PM +0200, Andi Kleen wrote:
> You only need Intel and AMD prefetch. For all Athlons the SSE prefetches
> work (because we force the SSE MSR bit to on).
Except those before Athlon XP which didn't have SSE.
Dave
next prev parent reply other threads:[~2003-04-22 16:00 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <200304220111.h3M1BEp5004047@hera.kernel.org>
2003-04-22 8:43 ` [PATCH] Runtime memory barrier patching Arjan van de Ven
2003-04-22 11:18 ` Andi Kleen
2003-04-22 16:11 ` Dave Jones [this message]
2003-04-22 10:12 Chuck Ebbert
-- strict thread matches above, loose matches on Subject: below --
2003-04-21 23:41 Chuck Ebbert
2003-04-22 0:04 ` Jamie Lokier
2003-04-21 19:27 Andi Kleen
2003-04-21 19:59 ` Linus Torvalds
2003-04-21 20:53 ` Andi Kleen
2003-04-21 21:04 ` Linus Torvalds
2003-04-21 21:43 ` Ulrich Drepper
2003-04-21 22:05 ` Linus Torvalds
2003-04-21 22:45 ` Andi Kleen
2003-04-21 22:11 ` Andi Kleen
2003-04-21 22:23 ` Linus Torvalds
2003-04-21 22:59 ` Andi Kleen
2003-04-21 23:35 ` Jamie Lokier
2003-04-21 23:46 ` Andi Kleen
2003-04-21 23:57 ` Jamie Lokier
2003-04-22 0:06 ` Linus Torvalds
2003-04-22 0:13 ` Jamie Lokier
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