From: Andi Kleen <ak@muc.de>
To: Adrian Bunk <bunk@fs.tum.de>
Cc: Andi Kleen <ak@muc.de>,
torvalds@transmeta.com, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] Support worst case cache line sizes as config option
Date: Mon, 28 Apr 2003 13:47:17 +0200 [thread overview]
Message-ID: <20030428114717.GA6904@averell> (raw)
In-Reply-To: <20030428091616.GA27064@fs.tum.de>
On Mon, Apr 28, 2003 at 11:16:16AM +0200, Adrian Bunk wrote:
> Your X86_GENERIC is semantically equivalent to M386.
M386 is tuning for the Intel 386
X86_GENERIC is "try to tune for all CPUs if possible"
> This doesn't work. E.g. MPENTIUMIII has the semantics of "support
> Pentium-III and above". If you want to compile a kernel that runs on
> both a Pentium-III and a Pentium-4 you choose MPENTIUMIII which implies
> X86_L1_CACHE_SHIFT=5 ...
Admittedly the other options could be changed to
default "4" if (MELAN || M486 || M386) && !X86_GENERIC
but that looked a bit too ugly and it seems to work even without.
-Andi
next prev parent reply other threads:[~2003-04-28 11:36 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-04-27 2:23 [PATCH] Support worst case cache line sizes as config option Andi Kleen
[not found] ` <BKEGKPICNAKILKJKMHCAAEPNCIAA.Riley@Williams.Name>
2003-04-27 12:52 ` Andi Kleen
2003-04-28 9:16 ` Adrian Bunk
2003-04-28 11:47 ` Andi Kleen [this message]
2003-04-28 12:19 ` Adrian Bunk
2003-04-28 22:00 ` Andi Kleen
2003-04-28 12:48 ` Jamie Lokier
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