From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Date: Wed, 13 Aug 2003 10:51:55 -0600 From: Grant Grundler To: Joel Soete Cc: parisc-linux@lists.parisc-linux.org Subject: Re: [parisc-linux] itlb miss handler optimizations! Message-ID: <20030813165155.GE18794@dsl2.external.hp.com> References: <20030813160532.GG17512@systemhalted> <3F28D766000037C6@ocpmta4.freegates.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: <3F28D766000037C6@ocpmta4.freegates.net> Sender: parisc-linux-admin@lists.parisc-linux.org Errors-To: parisc-linux-admin@lists.parisc-linux.org List-Help: List-Post: List-Subscribe: , List-Id: parisc-linux developers list List-Unsubscribe: , List-Archive: On Wed, Aug 13, 2003 at 06:43:27PM +0200, Joel Soete wrote: > hmm what is an interlock? (just to complet my knowledge) It's the logic in a CPU to stall an instruction which is waiting for the results of a previous instruction. ie the register contents used by the second instruction are not valid until any previous instruction actually completes. grant