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From: Ben Johnson <ben@blarg.net>
To: William Lee Irwin III <wli@holomorphy.com>
Cc: "Martin J. Bligh" <mbligh@aracnet.com>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: linear vs. logical addresses?  how does cpu interpret kernel addrs?
Date: Tue, 16 Sep 2003 19:07:23 -0700	[thread overview]
Message-ID: <20030916190723.A26053@blarg.net> (raw)
In-Reply-To: <20030917015527.GX4306@holomorphy.com>; from wli@holomorphy.com on Tue, Sep 16, 2003 at 06:55:27PM -0700

On Tue, Sep 16, 2003 at 06:55:27PM -0700, William Lee Irwin III wrote:
> 
> You might want to look at intel's volume 3. They're kept in dedicated
> registers separate from the pointers and used implicitly.

I've been reading that too.  The problem is that there are 6 segment
selector registers and 4 of those are just for data segments.  several
data segments can be in use simultaneously and they can all have
different base addresses and limits.  The only explanation I've found so
far about how a segment is chosen is that logical address are 48-bit
values, yet sizeof(void *) == 4.  there has to be a way to match up
pointer with a segment, but I am unable to find it so far.  (maybe I
need a nap.)

Thanks,

- Ben


  reply	other threads:[~2003-09-17  2:07 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2003-09-16 22:47 linear vs. logical addresses? how does cpu interpret kernel addrs? Ben Johnson
2003-09-17  0:48 ` Martin J. Bligh
2003-09-17  0:54   ` William Lee Irwin III
2003-09-17  0:58     ` Martin J. Bligh
2003-09-17  1:44       ` Ben Johnson
2003-09-17  1:55         ` William Lee Irwin III
2003-09-17  2:07           ` Ben Johnson [this message]
2003-09-17  2:10             ` William Lee Irwin III
2003-09-17  2:32               ` Ben Johnson
2003-09-17  2:10         ` Felipe Alfaro Solana
2003-09-17 11:39 ` Richard B. Johnson
2003-09-17 19:42   ` Ben Johnson
2003-09-17 20:05     ` Richard B. Johnson
2003-09-17 20:44       ` Jamie Lokier

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