From: "J.A. Magallon" <jamagallon@able.es>
To: Ingo Oeser <ioe-lkml@rameria.de>
Cc: Lista Linux-Kernel <linux-kernel@vger.kernel.org>
Subject: Re: FEATURE REQUEST: Specific Processor Optimizations on x86 Architecture
Date: Mon, 27 Oct 2003 16:20:01 +0100 [thread overview]
Message-ID: <20031027152001.GC27333@werewolf.able.es> (raw)
In-Reply-To: <200310241301.41230.ioe-lkml@rameria.de> (from ioe-lkml@rameria.de on Fri, Oct 24, 2003 at 13:01:41 +0200)
On 10.24, Ingo Oeser wrote:
> Hi James,
>
> On Friday 24 October 2003 01:05, J.A. Magallon wrote:
> > There are some other specific code that could be used in the kernel,
> > for example mb() and so on can be implemented with {m,s,l}fence in p3/p4
> > processors, instead of the old 'lock; insn' (attached also).
>
> The sfence part might be ok (modulo errata not known to me), but
> replacing "This Barrier not needed on x86" with an instruction means,
> that either these instructions are NOPs or we have a real BUG there.
>
> Not using these mfence and lfence insn would mean less instructions,
> which is a good kernel optimization anyway ;-)
>
> Puzzled
>
Patch inlined. Credits should go to Zwane Mwaikambo <zwane@linux.realnet.co.sz>.
It adds the corresponding flags for PII) and P4, and in case thei are defined,
the *fence insn are used.
Included is also one other patch by Zwane, which states that smp_call_function
needs mb() instead of wmb().
I use them regularly, so they look safe. Are they really better ? At least they
do not touch any register, like the trick used till now.
22-x86-mb:
--- linux-2.4.21-pre5-jam1/arch/i386/config.in.orig 2003-03-07 03:50:19.000000000 +0100
+++ linux-2.4.21-pre5-jam1/arch/i386/config.in 2003-03-07 03:50:47.000000000 +0100
@@ -113,6 +113,7 @@
define_bool CONFIG_X86_PGE y
define_bool CONFIG_X86_USE_PPRO_CHECKSUM y
define_bool CONFIG_X86_F00F_WORKS_OK y
+ define_bool CONFIG_X86_SFENCE y
fi
if [ "$CONFIG_MPENTIUM4" = "y" ]; then
define_int CONFIG_X86_L1_CACHE_SHIFT 7
@@ -121,6 +122,9 @@
define_bool CONFIG_X86_PGE y
define_bool CONFIG_X86_USE_PPRO_CHECKSUM y
define_bool CONFIG_X86_F00F_WORKS_OK y
+ define_bool CONFIG_X86_SFENCE y
+ define_bool CONFIG_X86_LFENCE y
+ define_bool CONFIG_X86_MFENCE y
fi
if [ "$CONFIG_MK6" = "y" ]; then
define_int CONFIG_X86_L1_CACHE_SHIFT 5
--- linux-2.4.21-pre5-jam1/include/asm-i386/system.h.orig 2003-03-07 03:51:31.000000000 +0100
+++ linux-2.4.21-pre5-jam1/include/asm-i386/system.h 2003-03-07 03:51:40.000000000 +0100
@@ -290,16 +290,33 @@
*
* Some non intel clones support out of order store. wmb() ceases to be a
* nop for these.
+ *
+ * Pentium III introduced the SFENCE instruction for serialising all store
+ * operations, Pentium IV further introduced LFENCE and MFENCE for load and
+ * memory barriers respecively.
*/
-
+
+#ifdef CONFIG_X86_MFENCE
+#define mb() __asm__ __volatile__ ("mfence": : :"memory")
+#else
#define mb() __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory")
+#endif
+
+#ifdef CONFIG_X86_LFENCE
+#define rmb() __asm__ __volatile__ ("lfence": : :"memory")
+#else
#define rmb() mb()
+#endif
+#ifdef CONFIG_X86_SFENCE
+#define wmb() __asm__ __volatile__ ("sfence": : :"memory")
+#else
#ifdef CONFIG_X86_OOSTORE
#define wmb() __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory")
#else
#define wmb() __asm__ __volatile__ ("": : :"memory")
#endif
+#endif /* CONFIG_X86_SFENCE */
#ifdef CONFIG_SMP
#define smp_mb() mb()
009-smp-call-mb:
diff -u -p -B -r1.2 smp.c
--- linux-2.4.20/arch/i386/kernel/smp.c 11 Apr 2003 13:44:11 -0000 1.2
+++ linux-2.4.20/arch/i386/kernel/smp.c 11 Apr 2003 13:44:27 -0000
@@ -553,7 +553,7 @@ int smp_call_function (void (*func) (voi
spin_lock(&call_lock);
call_data = &data;
- wmb();
+ mb();
/* Send a message to all other CPUs and wait for them to respond */
send_IPI_allbutself(CALL_FUNCTION_VECTOR);
--
J.A. Magallon <jamagallon()able!es> \ Software is like sex:
werewolf!able!es \ It's better when it's free
Mandrake Linux release 9.2 (Cooker) for i586
Linux 2.4.23-pre8-jam1 (gcc 3.3.1 (Mandrake Linux 9.2 3.3.1-4mdk))
next prev parent reply other threads:[~2003-10-27 15:20 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-10-22 12:55 FEATURE REQUEST: Specific Processor Optimizations on x86 Architecture Joseph D. Wagner
2003-10-23 0:12 ` Måns Rullgård
2003-10-22 13:26 ` Joseph D. Wagner
2003-10-23 0:37 ` Michael Rozhavsky
2003-10-23 0:15 ` Dave Jones
2003-10-22 13:47 ` Joseph D. Wagner
2003-10-23 1:02 ` Rik van Riel
2003-10-23 1:14 ` Joseph D. Wagner
2003-10-23 1:18 ` Rik van Riel
2003-10-23 9:26 ` Jan-Benedict Glaw
2003-10-23 9:35 ` Måns Rullgård
2003-10-23 1:06 ` Tim Hockin
2003-10-22 15:40 ` Joseph D. Wagner
2003-10-23 14:57 ` Rik van Riel
2003-10-23 1:23 ` Dave Jones
2003-10-22 15:35 ` Joseph D. Wagner
2003-10-23 2:52 ` William Lee Irwin III
2003-10-23 9:35 ` Jan-Benedict Glaw
2003-10-23 13:40 ` Jesse Pollard
2003-10-23 14:57 ` Charles Cazabon
2003-10-23 15:34 ` David Zaffiro
2003-10-23 17:26 ` Rob
2003-10-23 23:05 ` J.A. Magallon
2003-10-23 23:24 ` Nick Piggin
[not found] ` <200310241301.41230.ioe-lkml@rameria.de>
2003-10-27 15:20 ` J.A. Magallon [this message]
2003-10-27 20:52 ` Zwane Mwaikambo
[not found] <JB3R.23s.23@gated-at.bofh.it>
[not found] ` <JBn4.2xt.19@gated-at.bofh.it>
[not found] ` <JBPW.36x.3@gated-at.bofh.it>
2003-10-23 8:32 ` Ihar 'Philips' Filipau
2003-10-23 8:37 ` Ihar 'Philips' Filipau
[not found] ` <JWKQ.7nS.15@gated-at.bofh.it>
[not found] ` <LhtX.bs.15@gated-at.bofh.it>
[not found] ` <LhtX.bs.13@gated-at.bofh.it>
2003-10-27 18:33 ` Andi Kleen
2003-10-27 21:05 ` Zwane Mwaikambo
[not found] <JB3R.23s.23@gated-at.bofh.it.suse.lists.linux.kernel>
[not found] ` <JWKQ.7nS.15@gated-at.bofh.it.suse.lists.linux.kernel>
[not found] ` <LhtX.bs.15@gated-at.bofh.it.suse.lists.linux.kernel>
[not found] ` <LhtX.bs.13@gated-at.bofh.it.suse.lists.linux.kernel>
[not found] ` <m3k76qsf8i.fsf@averell.firstfloor.org.suse.lists.linux.kernel>
[not found] ` <Pine.LNX.4.53.0310271603580.21953@montezuma.fsmlabs.com.suse.lists.linux.kernel>
2003-10-27 21:15 ` Andi Kleen
2003-11-18 14:28 ` Zwane Mwaikambo
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