Re: Bitfield usage in FADT table?

[Ducrot Bruno <ducrot-kk6yZipjEM5g9hUCZPvPmw@public.gmane.org>]

On Tue, Nov 11, 2003 at 06:18:45PM +0100, maximE bizon wrote:
> 
> On Tue, Nov 11, 2003 at 06:02:45PM +0100, Ducrot Bruno wrote:
> 
> > > begin dump of fadt:
> > > [...]
> > > 6e	0
> > > 6f	0
> > > 70	f1
> > > 71	a2
> > > 72	35
> > > 73	78
> > > 74	0
> > > 75	0
> > > [...]
> > > bit wb_invd is 1
> > > bit wb_invd_flush is 0
> > > bit proc_c1 is 0
> > > bit plvl2_up is 0
> > > bit pwr_button is 1
> > > bit sleep_button is 1
> > > bit fixed_rTC is 1
> > > bit rtcs4 is 1
> > > bit tmr_val_ext is 0
> > > bit dock_cap is 1
> > > bit reset_reg_sup is 0
> > > bit sealed_case is 0
> > > bit headless is 0
> > > bit cpu_sw_sleep is 1
> > > 
> 
> > > Is it really what it is supposed to be?
> > 
> > To be what?
> 
> According to the ACPI specs:
> 
> value		bit offset
> =====		==========
> wb_invd		0
> wb_invd_flush	1
> proc_c1		2
> plvl2_up	3
> pwr_button	4
> sleep_button	5
> [...]
> 
> So, for instance, sleep_button should be 0, no ?

No.  This is a double word, so, with endianess issues, you
actually have overwriten with
0x7825a2f1

and bit 5 of 0x7825a2f1 is 1.

-- 
Ducrot Bruno

--  Which is worse:  ignorance or apathy?
--  Don't know.  Don't care.


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