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From: Jeremy Higdon <jeremy@sgi.com>
To: James Bottomley <James.Bottomley@steeleye.com>
Cc: Jes Sorensen <jes@wildopensource.com>,
	SCSI Mailing List <linux-scsi@vger.kernel.org>
Subject: Re: qla1280 endiannes and 64/32bit fixes
Date: Sat, 17 Jan 2004 18:43:26 -0800	[thread overview]
Message-ID: <20040118024326.GA381527@sgi.com> (raw)
In-Reply-To: <1074382860.1756.20.camel@mulgrave>

On Sat, Jan 17, 2004 at 06:40:58PM -0500, James Bottomley wrote:
> 
> @@ -2393,16 +2420,6 @@
>  	/* Disable RISC load of firmware. */
>  	ha->flags.disable_risc_code_load =
>  		nv->cntr_flags_1.disable_loading_risc_code;
> -
> -#ifdef QLA_64BIT_PTR
> -	/* Enable 64bit addressing for OS/System combination supporting it   */
> -	/* actual NVRAM bit is: nv->cntr_flags_1.enable_64bit_addressing     */
> -	/* but we will ignore it and use BITS_PER_LONG macro to setup for    */
> -	/* 64 or 32 bit access of host memory in all x86/ia-64/Alpha systems */
> -	ha->flags.enable_64bit_addressing = 1;
> -#else
> -	ha->flags.enable_64bit_addressing = 0;
> -#endif
>  
>  	if (ha->flags.enable_64bit_addressing) {
>  		dprintk(2, "scsi(%li): 64 Bit PCI Addressing Enabled\n",


What is the reason for this change?  Is there an alternate way that this
gets set?

jeremy

  reply	other threads:[~2004-01-18  2:43 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2004-01-17 23:40 qla1280 endiannes and 64/32bit fixes James Bottomley
2004-01-18  2:43 ` Jeremy Higdon [this message]
2004-01-18  3:16   ` James Bottomley
2004-01-18  6:21     ` Andrew Vasquez
2004-01-18  7:33       ` Jeremy Higdon
2004-01-18 14:54         ` James Bottomley
2004-01-18 21:59           ` Jes Sorensen
2004-01-19 17:40           ` Christoph Hellwig
2004-01-19 21:13             ` Jes Sorensen
2004-01-18 14:35       ` James Bottomley
2004-01-19  8:54       ` Jes Sorensen
2004-01-18  7:08     ` Jeremy Higdon

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