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From: "David S. Miller" <davem@redhat.com>
To: kumarkr@us.ibm.com
Cc: kuznet@ms2.inr.ac.ru, mashirle@us.ibm.com, netdev@oss.sgi.com,
	xma@us.ibm.com
Subject: Re: [PATCH]snmp6 64-bit counter support in proc.c
Date: Thu, 22 Jan 2004 16:35:04 -0800 (PST)	[thread overview]
Message-ID: <20040122.163504.74739809.davem@redhat.com> (raw)
In-Reply-To: <OFA2457112.0F3CBC9D-ON88256E23.007C851A@us.ibm.com>

   From: Krishna Kumar <kumarkr@us.ibm.com>
   Date: Thu, 22 Jan 2004 14:50:15 -0800
   
   Isn't memory barrier used to stop re-ordering of instructions and needs to
   be present in both reader as well as writer to have synchronization
   since mb is for the CPU on which it is executing ?

You are correct.

Good thing I delayed this for a release, now we can work on
making sure we get this right. :-)

  reply	other threads:[~2004-01-23  0:35 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2004-01-22 22:50 [PATCH]snmp6 64-bit counter support in proc.c Krishna Kumar
2004-01-23  0:35 ` David S. Miller [this message]
  -- strict thread matches above, loose matches on Subject: below --
2004-01-28 20:15 Shirley Ma
2004-01-28 20:09 Shirley Ma
2004-01-28 19:19 Krishna Kumar
2004-01-28 19:33 ` David S. Miller
2004-01-23 18:06 Shirley Ma
2004-01-23  2:57 Krishna Kumar
2004-01-23  2:45 Krishna Kumar
2004-01-28 19:09 ` David S. Miller
2004-01-23  1:08 Shirley Ma
2004-01-23  1:43 ` David S. Miller
2004-01-22 21:18 Krishna Kumar
2004-01-22 22:10 ` David S. Miller
2004-01-21 23:44 Shirley Ma
2004-01-21 19:45 Shirley Ma
2004-01-21 20:27 ` YOSHIFUJI Hideaki / 吉藤英明
2004-01-21 22:05 ` David S. Miller
2004-01-22 18:26 ` kuznet
2003-12-05 21:55 Shirley Ma
2003-12-02 12:40 IPv6 MIB:ipv6PrefixTable implementation kuznet
2003-12-05 20:14 ` [PATCH]snmp6 64-bit counter support in proc.c Shirley Ma
2003-12-05 20:31   ` David S. Miller
2004-01-14 22:52     ` Shirley Ma
2004-01-15  8:57       ` David S. Miller

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