From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dave Jones Subject: Re: powernow-k8: support acpi Date: Fri, 2 Apr 2004 12:13:30 +0100 Sender: cpufreq-bounces@www.linux.org.uk Message-ID: <20040402111330.GG24789@redhat.com> References: <99F2150714F93F448942F9A9F112634C1163C8D7@txexmtae.amd.com> <20040321185417.GA7969@dominikbrodowski.de> <20040326122931.GA321@elf.ucw.cz> <20040401235635.GA25744@redhat.com> <20040402083038.GA307@elf.ucw.cz> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="1LKvkjL3sHcu1TtY" Return-path: Content-Disposition: inline In-Reply-To: <20040402083038.GA307@elf.ucw.cz> List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: cpufreq-bounces+glkc-cpufreq=gmane.org@www.linux.org.uk To: Pavel Machek Cc: Andrew Morton , Bruno Ducrot , mark.langsdorf@amd.com, Cpufreq mailing list , paul.devriendt@amd.com, Dominik Brodowski --1LKvkjL3sHcu1TtY Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Fri, Apr 02, 2004 at 10:30:38AM +0200, Pavel Machek wrote: > Adding of data->, too? Could you mail me your latest powernow-k8.[ch]? Ok, I think that was the bulk of it done. The file attached is the current state of play in the cpufreq bk tree. It has the data-> stuff merged too. It compiles, but I'm not convinced it'll run as some of the chunks are still missing. This should get us a lot closer though. The next stage of the merge should be a lot simpler. Want to send me another diff vs this, and we'll see where we stand? The biggest outstanding chunk should be the acpi stuff, which I'm still undecided on, but we'll worry about that after any more trivial bits get merged. I did make a small number of additional edits. Whitespace & removal of unnecessary inline's. Other than that, we should be pretty close. Andrew, the additional powernow-k8 diff in your tree stands no chance of applying with this stuff merged. I'd suggest to just drop it. We'll soon resolve the conflicts anyway. Dave --1LKvkjL3sHcu1TtY Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename="powernow-k8.c" /* * (c) 2003, 2004 Advanced Micro Devices, Inc. * Your use of this code is subject to the terms and conditions of the * GNU general public license version 2. See "COPYING" or * http://www.gnu.org/licenses/gpl.html * * Support : paul.devriendt@amd.com * * Based on the powernow-k7.c module written by Dave Jones. * (C) 2003 Dave Jones on behalf of SuSE Labs * (C) 2004 Dominik Brodowski * (C) 2004 Pavel Machek * Licensed under the terms of the GNU GPL License version 2. * Based upon datasheets & sample CPUs kindly provided by AMD. * * Valuable input gratefully received from Dave Jones, Pavel Machek, * Dominik Brodowski, and others. * Processor information obtained from Chapter 9 (Power and Thermal Management) * of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD * Opteron Processors" available for download from www.amd.com */ #include #include #include #include #include #include #include #include #include #include #define PFX "powernow-k8: " #define BFX PFX "BIOS error: " #define VERSION "version 1.00.08a" #include "powernow-k8.h" static struct powernow_k8_data *powernow_data[NR_CPUS]; /* The PSB table supplied by BIOS allows for the definition of the number of p-states that can be used when running on a/c, and the number of p-states that can be used when running on battery. This allows laptop manufacturers to force the system to save power when running from battery. The relationship is : 1 <= number_of_battery_p_states <= maximum_number_of_p_states This driver does NOT have the support in it to detect transitions from a/c power to battery power, and thus trigger the transition to a lower p-state if required. This is because I need ACPI and the 2.6 kernel to do this, and this is a 2.4 kernel driver. Check back for a new improved driver for the 2.6 kernel soon. This code therefore assumes it is on battery at all times, and thus restricts performance to number_of_battery_p_states. For desktops, number_of_battery_p_states == maximum_number_of_pstates, so this is not actually a restriction. */ static u32 batps; /* limit on the number of p states when on battery */ /* - set by BIOS in the PSB/PST */ /* Return a frequency in MHz, given an input fid */ static u32 find_freq_from_fid(u32 fid) { return 800 + (fid * 100); } /* Return the vco fid for an input fid */ static u32 convert_fid_to_vco_fid(u32 fid) { if (fid < HI_FID_TABLE_BOTTOM) { return 8 + (2 * fid); } else { return fid; } } /* * Return 1 if the pending bit is set. Unless we just instructed the processor * to transition to a new state, seeing this bit set is really bad news. */ static inline int pending_bit_stuck(void) { u32 lo, hi; rdmsr(MSR_FIDVID_STATUS, lo, hi); return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0; } /* * Update the global current fid / vid values from the status msr. * Returns 1 on error. */ static int query_current_values_with_pending_wait(struct powernow_k8_data *data) { u32 lo, hi; u32 i = 0; lo = MSR_S_LO_CHANGE_PENDING; while (lo & MSR_S_LO_CHANGE_PENDING) { if (i++ > 0x1000000) { printk(KERN_ERR PFX "detected change pending stuck\n"); return 1; } rdmsr(MSR_FIDVID_STATUS, lo, hi); } data->currvid = hi & MSR_S_HI_CURRENT_VID; data->currfid = lo & MSR_S_LO_CURRENT_FID; return 0; } /* the isochronous relief time */ static inline void count_off_irt(struct powernow_k8_data *data) { udelay((1 << data->irt) * 10); return; } /* the voltage stabalization time */ static inline void count_off_vst(struct powernow_k8_data *data) { udelay(data->vstable * VST_UNITS_20US); return; } /* write the new fid value along with the other control fields to the msr */ static int write_new_fid(struct powernow_k8_data *data, u32 fid) { u32 lo; u32 savevid = data->currvid; if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) { printk(KERN_ERR PFX "internal error - overflow on fid write\n"); return 1; } lo = fid | (data->currvid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID; dprintk(KERN_DEBUG PFX "writing fid %x, lo %x, hi %x\n", fid, lo, data->plllock * PLL_LOCK_CONVERSION); wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION); if (query_current_values_with_pending_wait(data)) return 1; count_off_irt(data); if (savevid != data->currvid) { printk(KERN_ERR PFX "vid change on fid trans, old %x, new %x\n", savevid, data->currvid); return 1; } if (fid != data->currfid) { printk(KERN_ERR PFX "fid trans failed, fid %x, curr %x\n", fid, data->currfid); return 1; } return 0; } /* Write a new vid to the hardware */ static int write_new_vid(struct powernow_k8_data *data, u32 vid) { u32 lo; u32 savefid = data->currfid; if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) { printk(KERN_ERR PFX "internal error - overflow on vid write\n"); return 1; } lo = data->currfid | (vid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID; dprintk(KERN_DEBUG PFX "writing vid %x, lo %x, hi %x\n", vid, lo, STOP_GRANT_5NS); wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS); if (query_current_values_with_pending_wait(data)) return 1; if (savefid != data->currfid) { printk(KERN_ERR PFX "fid changed on vid trans, old %x new %x\n", savefid, data->currfid); return 1; } if (vid != data->currvid) { printk(KERN_ERR PFX "vid trans failed, vid %x, curr %x\n", vid, data->currvid); return 1; } return 0; } /* * Reduce the vid by the max of step or reqvid. * Decreasing vid codes represent increasing voltages: * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of 0x1f is off. */ static int decrease_vid_code_by_step(struct powernow_k8_data *data, u32 reqvid, u32 step) { if ((data->currvid - reqvid) > step) reqvid = data->currvid - step; if (write_new_vid(data, reqvid)) return 1; count_off_vst(data); return 0; } /* Change the fid and vid, by the 3 phases. */ static int transition_fid_vid(struct powernow_k8_data *data, u32 reqfid, u32 reqvid) { if (core_voltage_pre_transition(data, reqvid)) return 1; if (core_frequency_transition(data, reqfid)) return 1; if (core_voltage_post_transition(data, reqvid)) return 1; if (query_current_values_with_pending_wait(data)) return 1; if ((reqfid != data->currfid) || (reqvid != data->currvid)) { printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n", smp_processor_id(), reqfid, reqvid, data->currfid, data->currvid); return 1; } dprintk(KERN_INFO PFX "transitioned (cpu%d): new fid 0x%x, vid 0x%x\n", smp_processor_id(), data->currfid, data->currvid); return 0; } /* Phase 1 - core voltage transition ... setup voltage */ static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid) { u32 rvosteps = data->rvo; u32 savefid = data->currfid; dprintk(KERN_DEBUG PFX "ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n", smp_processor_id(); data->currfid, data->currvid, reqvid, data->rvo); while (data->currvid > reqvid) { dprintk(KERN_DEBUG PFX "ph1: curr 0x%x, req vid 0x%x\n", data->currvid, reqvid); if (decrease_vid_code_by_step(data, reqvid, data->vidmvs)) return 1; } while (rvosteps > 0) { if (data->currvid == 0) { rvosteps = 0; } else { dprintk(KERN_DEBUG PFX "ph1: changing vid for rvo, req 0x%x\n", data->currvid - 1); if (decrease_vid_code_by_step(data, data->currvid - 1, 1)) return 1; rvosteps--; } } if (query_current_values_with_pending_wait(data)) return 1; if (savefid != data->currfid) { printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n", data->currfid); return 1; } dprintk(KERN_DEBUG PFX "ph1 complete, currfid 0x%x, currvid 0x%x\n", data->currfid, data->currvid); return 0; } /* Phase 2 - core frequency transition */ static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid) { u32 vcoreqfid; u32 vcocurrfid; u32 vcofiddiff; u32 savevid = data->currvid; if ((reqfid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) { printk(KERN_ERR PFX "ph2: illegal lo-lo transition 0x%x 0x%x\n", reqfid, data->currfid); return 1; } if (data->currfid == reqfid) { printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n", data->currfid); return 0; } dprintk(KERN_DEBUG PFX "ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n", smp_processor_id(), data->currfid, data->currvid, reqfid); vcoreqfid = convert_fid_to_vco_fid(reqfid); vcocurrfid = convert_fid_to_vco_fid(data->currfid); vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid : vcoreqfid - vcocurrfid; while (vcofiddiff > 2) { if (reqfid > data->currfid) { if (data->currfid > LO_FID_TABLE_TOP) { if (write_new_fid(data, data->currfid + 2)) { return 1; } } else { if (write_new_fid (data, 2 + convert_fid_to_vco_fid(data->currfid))) { return 1; } } } else { if (write_new_fid(data, data->currfid - 2)) return 1; } vcocurrfid = convert_fid_to_vco_fid(data->currfid); vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid : vcoreqfid - vcocurrfid; } if (write_new_fid(data, reqfid)) return 1; if (query_current_values_with_pending_wait(data)) return 1; if (data->currfid != reqfid) { printk(KERN_ERR PFX "ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n", data->currfid, reqfid); return 1; } if (savevid != data->currvid) { printk(KERN_ERR PFX "ph2: vid changed, save %x, curr %x\n", savevid, data->currvid); return 1; } dprintk(KERN_DEBUG PFX "ph2 complete, currfid 0x%x, currvid 0x%x\n", data->currfid, data->currvid); return 0; } /* Phase 3 - core voltage transition flow ... jump to the final vid. */ static int core_voltage_post_transition(struct powernow_k8_data *data, u32 reqvid) { u32 savefid = data->currfid; u32 savereqvid = reqvid; dprintk(KERN_DEBUG PFX "ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n", smp_processor_id(), data->currfid, data->currvid); if (reqvid != data->currvid) { if (write_new_vid(data, reqvid)) return 1; if (savefid != data->currfid) { printk(KERN_ERR PFX "ph3: bad fid change, save %x, curr %x\n", savefid, data->currfid); return 1; } if (data->currvid != reqvid) { printk(KERN_ERR PFX "ph3: failed vid transition\n, req %x, curr %x", reqvid, data->currvid); return 1; } } if (query_current_values_with_pending_wait(data)) return 1; if (savereqvid != data->currvid) { dprintk(KERN_ERR PFX "ph3 failed, currvid 0x%x\n", data->currvid); return 1; } if (savefid != data->currfid) { dprintk(KERN_ERR PFX "ph3 failed, currfid changed 0x%x\n", data->currfid); return 1; } dprintk(KERN_DEBUG PFX "ph3 complete, currfid 0x%x, currvid 0x%x\n", data->currfid, data->currvid); return 0; } static int check_supported_cpu(unsigned int cpu) { struct cpuinfo_x86 *c = cpu_data; u32 eax, ebx, ecx, edx; if (num_online_cpus() != 1) { printk(KERN_INFO PFX "multiprocessor systems not supported\n"); return 0; } if (c->x86_vendor != X86_VENDOR_AMD) { #ifdef MODULE printk(KERN_INFO PFX "Not an AMD processor\n"); #endif return 0; } eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); if ((eax & CPUID_XFAM_MOD) == ATHLON64_XFAM_MOD) { dprintk(KERN_DEBUG PFX "AMD Althon 64 Processor found\n"); if ((eax & CPUID_F1_STEP) < ATHLON64_REV_C0) { printk(KERN_INFO PFX "Revision C0 or better " "AMD Athlon 64 processor required\n"); return 0; } } else if ((eax & CPUID_XFAM_MOD) == OPTERON_XFAM_MOD) { dprintk(KERN_DEBUG PFX "AMD Opteron Processor found\n"); } else { printk(KERN_INFO PFX "AMD Athlon 64 or AMD Opteron processor required\n"); return 0; } eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES); if (eax < CPUID_FREQ_VOLT_CAPABILITIES) { printk(KERN_INFO PFX "No frequency change capabilities detected\n"); return 0; } cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx); if ((edx & P_STATE_TRANSITION_CAPABLE) != P_STATE_TRANSITION_CAPABLE) { printk(KERN_INFO PFX "Power state transitions not supported\n"); return 0; } printk(KERN_INFO PFX "Found AMD64 processor supporting PowerNow (" VERSION ")\n"); return 1; } static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid) { unsigned int j; u8 lastfid = 0xFF; for (j = 0; j < data->numps; j++) { if (pst[j].vid > LEAST_VID) { printk(KERN_ERR PFX "vid %d invalid : 0x%x\n", j, pst[j].vid); return -EINVAL; } if (pst[j].vid < data->rvo) { /* vid + rvo >= 0 */ printk(KERN_ERR PFX "BIOS error - 0 vid exceeded with pstate %d\n", j); return -ENODEV; } if (pst[j].vid < maxvid + data->rvo) { /* vid + rvo >= maxvid */ printk(KERN_ERR PFX "BIOS error - maxvid exceeded with pstate %d\n", j); return -ENODEV; } if ((pst[j].fid > MAX_FID) || (pst[j].fid & 1) || (j && (pst[j].fid < HI_FID_TABLE_BOTTOM))) { /* Only first fid is allowed to be in "low" range */ printk(KERN_ERR PFX "fid %d invalid : 0x%x\n", j, pst[j].fid); return -EINVAL; } if (pst[j].fid < lastfid) lastfid = pst[j].fid; } if (lastfid & 1) { printk(KERN_ERR PFX "lastfid invalid\n"); return -EINVAL; } if (lastfid > LO_FID_TABLE_TOP) { printk(KERN_INFO PFX "first fid not from lo freq table\n"); } return 0; } /* Find and validate the PSB/PST table in BIOS. */ static int find_psb_table(struct powernow_k8_data *data) { struct cpufreq_frequency_table *powernow_table; struct psb_s *psb; struct pst_s *pst; unsigned int i, j; u32 mvs; u8 maxvid; for (i = 0xc0000; i < 0xffff0; i += 0x10) { /* Scan BIOS looking for the signature. */ /* It can not be at ffff0 - it is too big. */ psb = phys_to_virt(i); if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0) continue; dprintk(KERN_DEBUG PFX "found PSB header at 0x%p\n", psb); dprintk(KERN_DEBUG PFX "table vers: 0x%x\n", psb->tableversion); if (psb->tableversion != PSB_VERSION_1_4) { printk(KERN_INFO BFX "PSB table is not v1.4\n"); return -ENODEV; } dprintk(KERN_DEBUG PFX "flags: 0x%x\n", psb->flags1); if (psb->flags1) { printk(KERN_ERR BFX "unknown flags\n"); return -ENODEV; } data->vstable = psb->voltagestabilizationtime; dprintk(KERN_INFO PFX "voltage stabilization time: %d(*20us)\n", data->vstable); dprintk(KERN_DEBUG PFX "flags2: 0x%x\n", psb->flags2); data->rvo = psb->flags2 & 3; data->irt = ((psb->flags2) >> 2) & 3; mvs = ((psb->flags2) >> 4) & 3; data->vidmvs = 1 << mvs; data->batps = ((psb->flags2) >> 6) & 3; printk(KERN_INFO PFX "voltage stable in %d usec", data->vstable * 20); if (data->batps) printk(", only %d lowest states on battery", batps); printk(", ramp voltage offset: %d", data->rvo); printk(", isochronous relief time: %d", data->irt); printk(", maximum voltage step: %d\n", mvs); dprintk(KERN_DEBUG PFX "numpst: 0x%x\n", psb->numpst); if (psb->numpst != 1) { printk(KERN_ERR BFX "numpst must be 1\n"); return -ENODEV; } dprintk(KERN_DEBUG PFX "cpuid: 0x%x\n", psb->cpuid); data->plllock = psb->plllocktime; printk(KERN_INFO PFX "pll lock time: 0x%x, ", data->plllock); maxvid = psb->maxvid; printk("maxfid 0x%x (%d MHz), maxvid 0x%x\n", psb->maxfid, find_freq_from_fid(psb->maxfid), maxvid); data->numps = psb->numpstates; if (data->numps < 2) { printk(KERN_ERR BFX "no p states to transition\n"); return -ENODEV; } if (batps == 0) { batps = data->numps; } else if (batps > data->numps) { printk(KERN_ERR BFX "batterypstates > numpstates\n"); batps = data->numps; } else { printk(KERN_ERR PFX "Restricting operation to %d p-states\n", batps); printk(KERN_ERR PFX "Check for an updated driver to access all " "%d p-states\n", data->numps); } if (data->numps <= 1) { printk(KERN_ERR PFX "only 1 p-state to transition\n"); return -ENODEV; } pst = (struct pst_s *) (psb + 1); if (check_pst_table(data, pst, maxvid)) return -EINVAL; powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table) * (data->numps + 1)), GFP_KERNEL); if (!powernow_table) { printk(KERN_ERR PFX "powernow_table memory alloc failure\n"); return -ENOMEM; } for (j = 0; j < psb->numpstates; j++) { powernow_table[j].index = pst[j].fid; /* lower 8 bits */ powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */ } /* If you want to override your frequency tables, this is right place. */ for (j = 0; j < data->numps; j++) { powernow_table[j].frequency = find_freq_from_fid(powernow_table[j].index & 0xff)*1000; printk(KERN_INFO PFX " %d : fid 0x%x (%d MHz), vid 0x%x\n", j, powernow_table[j].index & 0xff, powernow_table[j].frequency/1000, powernow_table[j].index >> 8); } powernow_table[data->numps].frequency = CPUFREQ_TABLE_END; powernow_table[data->numps].index = 0; if (query_current_values_with_pending_wait(data)) { kfree(powernow_table); return -EIO; } printk(KERN_INFO PFX "currfid 0x%x (%d MHz), currvid 0x%x\n", data->currfid, find_freq_from_fid(data->currfid), data->currvid); for (j = 0; j < data->numps; j++) if ((pst[j].fid==data->currfid) && (pst[j].vid==data->currvid)) return 0; printk(KERN_ERR BFX "currfid/vid do not match PST, ignoring\n"); return 0; } printk(KERN_ERR BFX "no PSB\n"); return -ENODEV; } /* Take a frequency, and issue the fid/vid transition command */ static int transition_frequency(struct powernow_k8_data *data, unsigned int index) { u32 fid; u32 vid; int res; struct cpufreq_freqs freqs; /* fid are the lower 8 bits of the index we stored into * the cpufreq frequency table in find_psb_table, vid are * the upper 8 bits. */ fid = data->powernow_table[index].index & 0xFF; vid = (data->powernow_table[index].index & 0xFF00) >> 8; dprintk(KERN_DEBUG PFX "table matched fid 0x%x, giving vid 0x%x\n", fid, vid); if (query_current_values_with_pending_wait(data)) return 1; if ((data->currvid == vid) && (data->currfid == fid)) { dprintk(KERN_DEBUG PFX "target matches current values (fid 0x%x, vid 0x%x)\n", fid, vid); return 0; } if ((fid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) { printk(KERN_ERR PFX "ignoring illegal change in lo freq table-%x to %x\n", data->currfid, fid); return 1; } dprintk(KERN_DEBUG PFX "changing to fid 0x%x, vid 0x%x\n", fid, vid); freqs.cpu = data->cpu; freqs.old = find_freq_from_fid(data->currfid); freqs.new = find_freq_from_fid(fid); cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); res = transition_fid_vid(data, fid, vid); freqs.new = find_freq_from_fid(data->currfid); cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); return res; } /* Driver entry point to switch to the target frequency */ static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsigned relation) { struct powernow_k8_data *data = powernow_data[pol->cpu]; u32 checkfid = data->currfid; u32 checkvid = data->currvid; unsigned int newstate; if (pending_bit_stuck()) { printk(KERN_ERR PFX "drv targ fail: change pending bit set\n"); return -EIO; } dprintk(KERN_DEBUG PFX "targ: %d kHz, min %d, max %d, relation %d\n", targfreq, pol->min, pol->max, relation); if (query_current_values_with_pending_wait(data)) return -EIO; dprintk(KERN_DEBUG PFX "targ: curr fid 0x%x, vid 0x%x\n", data->currfid, data->currvid); if ((checkvid != data->currvid) || (checkfid != data->currfid)) { printk(KERN_ERR PFX "error - out of sync, fid 0x%x 0x%x, vid 0x%x 0x%x\n", checkfid, data->currfid, checkvid, data->currvid); } if (cpufreq_frequency_table_target(pol, data->powernow_table, targfreq, relation, &newstate)) return -EINVAL; if (transition_frequency(data, newstate)) { printk(KERN_ERR PFX "transition frequency failed\n"); return 1; } pol->cur = 1000 * find_freq_from_fid(data->currfid); return 0; } /* Driver entry point to verify the policy and range of frequencies */ static int powernowk8_verify(struct cpufreq_policy *pol) { struct powernow_k8_data *data = powernow_data[pol->cpu]; if (pending_bit_stuck()) { printk(KERN_ERR PFX "failing verify, change pending bit set\n"); return -EIO; } return cpufreq_frequency_table_verify(pol, data->powernow_table); } /* per CPU init entry point to the driver */ static int __init powernowk8_cpu_init(struct cpufreq_policy *pol) { struct powernow_k8_data *data; int rc; data = kmalloc(sizeof(struct powernow_k8_data), GFP_KERNEL); if (!data) { printk(KERN_ERR PFX "unable to alloc powernow_k8_data"); return -ENOMEM; } memset(data,0,sizeof(struct powernow_k8_data)); data->cpu = pol->cpu; if (pol->cpu != 0) { printk(KERN_ERR PFX "init not cpu 0\n"); kfree(data); return -ENODEV; } pol->governor = CPUFREQ_DEFAULT_GOVERNOR; rc = find_psb_table(data); if (rc) { kfree(data); return -ENODEV; } if (pending_bit_stuck()) { printk(KERN_ERR PFX "failing init, change pending bit set\n"); goto err_out; } /* Take a crude guess here. * That guess was in microseconds, so multply with 1000 */ pol->cpuinfo.transition_latency = (((data->rvo + 8) * data->vstable * VST_UNITS_20US) + (3 * (1 << data->irt) * 10)) * 1000; if (query_current_values_with_pending_wait(data)) return -EIO; pol->cur = 1000 * find_freq_from_fid(data->currfid); dprintk(KERN_DEBUG PFX "policy current frequency %d kHz\n", pol->cur); /* min/max the cpu is capable of */ if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) { printk(KERN_ERR PFX "invalid powernow_table\n"); kfree(data->powernow_table); kfree(data); return -EINVAL; } cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu); printk(KERN_INFO PFX "cpu_init done, current fid 0x%x, vid 0x%x\n", data->currfid, data->currvid); powernow_data[pol->cpu] = data; return 0; err_out: kfree(data); return -ENODEV; } static int __exit powernowk8_cpu_exit (struct cpufreq_policy *pol) { struct powernow_k8_data *data = powernow_data[pol->cpu]; if (!data) return -EINVAL; cpufreq_frequency_table_put_attr(pol->cpu); kfree(data->powernow_table); kfree(data); return 0; } static struct freq_attr* powernow_k8_attr[] = { &cpufreq_freq_attr_scaling_available_freqs, NULL, }; static struct cpufreq_driver cpufreq_amd64_driver = { .verify = powernowk8_verify, .target = powernowk8_target, .init = powernowk8_cpu_init, .exit = powernowk8_cpu_exit, .name = "powernow-k8", .owner = THIS_MODULE, .attr = powernow_k8_attr, }; /* driver entry point for init */ static int __init powernowk8_init(void) { unsigned int i, supported_cpus = 0; for (i=0; i"); MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver."); MODULE_LICENSE("GPL"); module_init(powernowk8_init); module_exit(powernowk8_exit); --1LKvkjL3sHcu1TtY Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename="powernow-k8.h" /* * (c) 2003 Advanced Micro Devices, Inc. * Your use of this code is subject to the terms and conditions of the * GNU general public license version 2. See "../../../COPYING" or * http://www.gnu.org/licenses/gpl.html */ struct powernow_k8_data { unsigned int cpu; u32 numps; /* number of p-states */ u32 batps; /* number of p-states supported on battery */ /* these values are constant when the PSB is used to determine * vid/fid pairings, but are modified during the ->target() call * when ACPI is used */ u32 rvo; /* ramp voltage offset */ u32 irt; /* isochronous relief time */ u32 vidmvs; /* usable value calculated from mvs */ u32 vstable; /* voltage stabilization time, units 20 us */ u32 plllock; /* pll lock time, units 1 us */ /* keep track of the current fid / vid */ u32 currvid; u32 currfid; /* the powernow_table includes all frequency and vid/fid pairings: * fid are the lower 8 bits of the index, vid are the upper 8 bits. * frequency is in kHz */ struct cpufreq_frequency_table *powernow_table; }; /* processor's cpuid instruction support */ #define CPUID_PROCESSOR_SIGNATURE 1 /* function 1 */ #define CPUID_F1_FAM 0x00000f00 /* family mask */ #define CPUID_F1_XFAM 0x0ff00000 /* extended family mask */ #define CPUID_F1_MOD 0x000000f0 /* model mask */ #define CPUID_F1_STEP 0x0000000f /* stepping level mask */ #define CPUID_XFAM_MOD 0x0ff00ff0 /* xtended fam, fam + model */ #define ATHLON64_XFAM_MOD 0x00000f40 /* xtended fam, fam + model */ #define OPTERON_XFAM_MOD 0x00000f50 /* xtended fam, fam + model */ #define ATHLON64_REV_C0 8 #define CPUID_GET_MAX_CAPABILITIES 0x80000000 #define CPUID_FREQ_VOLT_CAPABILITIES 0x80000007 #define P_STATE_TRANSITION_CAPABLE 6 /* Model Specific Registers for p-state transitions. MSRs are 64-bit. For */ /* writes (wrmsr - opcode 0f 30), the register number is placed in ecx, and */ /* the value to write is placed in edx:eax. For reads (rdmsr - opcode 0f 32), */ /* the register number is placed in ecx, and the data is returned in edx:eax. */ #define MSR_FIDVID_CTL 0xc0010041 #define MSR_FIDVID_STATUS 0xc0010042 /* Field definitions within the FID VID Low Control MSR : */ #define MSR_C_LO_INIT_FID_VID 0x00010000 #define MSR_C_LO_NEW_VID 0x00001f00 #define MSR_C_LO_NEW_FID 0x0000002f #define MSR_C_LO_VID_SHIFT 8 /* Field definitions within the FID VID High Control MSR : */ #define MSR_C_HI_STP_GNT_TO 0x000fffff /* Field definitions within the FID VID Low Status MSR : */ #define MSR_S_LO_CHANGE_PENDING 0x80000000 /* cleared when completed */ #define MSR_S_LO_MAX_RAMP_VID 0x1f000000 #define MSR_S_LO_MAX_FID 0x003f0000 #define MSR_S_LO_START_FID 0x00003f00 #define MSR_S_LO_CURRENT_FID 0x0000003f /* Field definitions within the FID VID High Status MSR : */ #define MSR_S_HI_MAX_WORKING_VID 0x001f0000 #define MSR_S_HI_START_VID 0x00001f00 #define MSR_S_HI_CURRENT_VID 0x0000001f /* fids (frequency identifiers) are arranged in 2 tables - lo and hi */ #define LO_FID_TABLE_TOP 6 #define HI_FID_TABLE_BOTTOM 8 #define LO_VCOFREQ_TABLE_TOP 1400 /* corresponding vco frequency values */ #define HI_VCOFREQ_TABLE_BOTTOM 1600 #define MIN_FREQ_RESOLUTION 200 /* fids jump by 2 matching freq jumps by 200 */ #define MAX_FID 0x2a /* Spec only gives FID values as far as 5 GHz */ #define LEAST_VID 0x1e /* Lowest (numerically highest) useful vid value */ #define MIN_FREQ 800 /* Min and max freqs, per spec */ #define MAX_FREQ 5000 #define INVALID_FID_MASK 0xffffffc1 /* not a valid fid if these bits are set */ #define INVALID_VID_MASK 0xffffffe0 /* not a valid vid if these bits are set */ #define STOP_GRANT_5NS 1 /* min poss memory access latency for voltage change */ #define PLL_LOCK_CONVERSION (1000/5) /* ms to ns, then divide by clock period */ #define MAXIMUM_VID_STEPS 1 /* Current cpus only allow a single step of 25mV */ #define VST_UNITS_20US 20 /* Voltage Stabalization Time is in units of 20us */ /* Version 1.4 of the PSB table. This table is constructed by BIOS and is to tell the OS's power management driver which VIDs and FIDs are supported by this particular processor. This information is obtained from the data sheets for each processor model by the system vendor and incorporated into the BIOS. If the data in the PSB / PST is wrong, then this driver will program the wrong values into hardware, which is very likely to lead to a crash. */ #define PSB_ID_STRING "AMDK7PNOW!" #define PSB_ID_STRING_LEN 10 #define PSB_VERSION_1_4 0x14 struct psb_s { u8 signature[10]; u8 tableversion; u8 flags1; u16 voltagestabilizationtime; u8 flags2; u8 numpst; u32 cpuid; u8 plllocktime; u8 maxfid; u8 maxvid; u8 numpstates; }; /* Pairs of fid/vid values are appended to the version 1.4 PSB table. */ struct pst_s { u8 fid; u8 vid; }; #ifdef DEBUG #define dprintk(msg...) printk(msg) #else #define dprintk(msg...) do { } while(0) #endif static inline int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid); static inline int core_voltage_post_transition(struct powernow_k8_data *data, u32 reqvid); static inline int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid); --1LKvkjL3sHcu1TtY Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Cpufreq mailing list Cpufreq@www.linux.org.uk http://www.linux.org.uk/mailman/listinfo/cpufreq --1LKvkjL3sHcu1TtY--