From: Daniel Jacobowitz <dan@debian.org>
To: Harm Verhagen <hverhagen@dse.nl>
Cc: linux-mips@linux-mips.org
Subject: Re: locking problems with mips atomicity ?
Date: Tue, 20 Apr 2004 18:49:05 -0400 [thread overview]
Message-ID: <20040420224904.GA21924@nevyn.them.org> (raw)
In-Reply-To: <1082501074.13783.54.camel@node-d-8d2e.a2000.nl>
On Wed, Apr 21, 2004 at 12:44:34AM +0200, Harm Verhagen wrote:
> The code from linux 2.4.26 arch-mips/atomic.h looks _very_ similar to
> the code described in the thread that has a BUG.
>
> static __inline__ void atomic_add(int i, atomic_t * v)
> {
> unsigned long temp;
>
> __asm__ __volatile__(
> "1: ll %0, %1 # atomic_add\n"
> " addu %0, %2 \n"
> " sc %0, %1 \n"
> " beqz %0, 1b \n"
> : "=&r" (temp), "=m" (v->counter)
> : "Ir" (i), "m" (v->counter));
> }
>
> So I wonder if there is a bug here.
> Can some MIPS guru check ? :)
It won't be a problem in the kernel. The problem only happens when the
assembler expands a macro to multiple instructions including a load,
and that only happens for position-independent code; the kernel is not
PIC.
--
Daniel Jacobowitz
MontaVista Software Debian GNU/Linux Developer
next prev parent reply other threads:[~2004-04-20 22:49 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-04-20 22:44 locking problems with mips atomicity ? Harm Verhagen
2004-04-20 22:49 ` Daniel Jacobowitz [this message]
2004-04-20 22:53 ` Harm Verhagen
2004-04-20 22:56 ` Daniel Jacobowitz
2004-04-21 12:43 ` Maciej W. Rozycki
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