From: Ralf Baechle <ralf@linux-mips.org>
To: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Cc: geert@linux-m68k.org, jsun@mvista.com, linux-mips@linux-mips.org
Subject: Re: semaphore woes in 2.6, 32bit
Date: Sun, 9 May 2004 18:48:35 +0200 [thread overview]
Message-ID: <20040509164835.GA28011@linux-mips.org> (raw)
In-Reply-To: <20040509.225637.92590265.anemo@mba.ocn.ne.jp>
On Sun, May 09, 2004 at 10:56:37PM +0900, Atsushi Nemoto wrote:
> ralf> We got tripped by a change in 2.6.6-rc2. Before that change the
> ralf> kmalloc slab caches were being created with SLAB_HWCACHE_ALIGN
> ralf> which results in L1_CACHE_SHIFT alignment for allocations of
> ralf> L1_CACHE_SHIFT for slab caches that are at least that size. For
> ralf> the sake of S390 this behaviour was changed; new it defaults to
> ralf> BYTES_PER_WORD alignment which is four bytes.
>
> ralf> Fixed by defining ARCH_KMALLOC_MINALIGN as 8.
>
> Hmm, many drivers use kmalloc and pci_map_single for DMA buffer. So
> ARCH_KMALLOC_MINALIGN should be L1_CACHE_BYTES for non-coherent
> system?
No, those drivers are simply broken. dma_get_cache_alignment() gives the
mimimum alignment and width for DMA mappings and that value is larger
than kmalloc alignment in almost all cases.
Ralf
next prev parent reply other threads:[~2004-05-09 16:48 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-05-08 1:10 semaphore woes in 2.6, 32bit Jun Sun
2004-05-08 7:18 ` Ralf Baechle
2004-05-09 5:48 ` Jun Sun
2004-05-09 9:09 ` Geert Uytterhoeven
2004-05-09 12:57 ` Ralf Baechle
2004-05-09 13:56 ` Atsushi Nemoto
2004-05-09 16:48 ` Ralf Baechle [this message]
2004-05-10 13:28 ` Atsushi Nemoto
2004-05-10 14:06 ` Ralf Baechle
2004-05-11 13:53 ` Atsushi Nemoto
2004-05-11 14:05 ` Ralf Baechle
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