From: Martin Mares <mj@ucw.cz>
To: Jeff Garzik <jgarzik@pobox.com>
Cc: Matt Domsch <Matt_Domsch@dell.com>,
linux-kernel@vger.kernel.org,
Marcelo Tosatti <marcelo.tosatti@cyclades.com>
Subject: Re: PCI devices with no PCI_CACHE_LINE_SIZE implemented
Date: Mon, 10 May 2004 12:49:46 +0200 [thread overview]
Message-ID: <20040510104946.GL1477@ucw.cz> (raw)
In-Reply-To: <409A5DA6.4020801@pobox.com>
Hi!
> I'd send it straight to Marcelo, saying that the 2.6 PCI maintainer
> approved it.... Martin hasn't hacked on kernel code in a while...
Anyway, looks OK for me :)
Have a nice fortnight
--
Martin `MJ' Mares <mj@ucw.cz> http://atrey.karlin.mff.cuni.cz/~mj/
Faculty of Math and Physics, Charles University, Prague, Czech Rep., Earth
Next lecture on time travel will be held on previous Monday.
next prev parent reply other threads:[~2004-05-10 10:50 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-05-06 13:28 PCI devices with no PCI_CACHE_LINE_SIZE implemented Matt Domsch
2004-05-06 15:45 ` Jeff Garzik
2004-05-10 10:49 ` Martin Mares [this message]
-- strict thread matches above, loose matches on Subject: below --
2004-04-29 19:53 Matt Domsch
2004-05-05 22:31 ` Greg KH
2004-05-05 22:48 ` Matt Domsch
2004-05-05 23:42 ` Greg KH
2004-05-05 22:50 ` Matt Domsch
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