Re: [parisc-linux] PA8800/ZX1 support committed to 2.6.7-rc2-pa2

[Grant Grundler <grundler@parisc-linux.org>]

On Sat, Jun 05, 2004 at 09:10:51AM -0500, James Bottomley wrote:
> Your explanation is possible, but it's highly unlikely to be an existing
> problem.  PA currently uses the big hammer approach to cache coherency
> and flushes everything on virtually every large mmu changing operation. 
> If there's a caching problem in between the flushes it should have shown
> up on much smaller cache machines as well.
> 
> Also, when doing the no flushing updates to improve fork/exec, I removed
> the global flushing so now any cache mismanagement would become
> cumulative and should definitely have been seen.

Well, I can only point at the difference in cache size.

> My money would be on an additional architectural requirement of the
> PA8800 (maybe even an existing PA one that the <PA8800 just don't need)
> that we don't respect.

yes - and we've changed chipsets too.

Any good ideas on how to prove IO is coherent?

It might be the same problem that Naresh described as "SCSI DMA problems".
I just happen to be using NFS Root instead.

But I found one bug in Naresh's port that might explain his problem
(wasn't flushing IO TLB properly). It would be interesting to hear
if 2.6.7-rc2-pa3 works better for him.

grant
_______________________________________________
parisc-linux mailing list
parisc-linux@lists.parisc-linux.org
http://lists.parisc-linux.org/mailman/listinfo/parisc-linux