From: Jesse Barnes <jbarnes@engr.sgi.com>
To: Nick Piggin <nickpiggin@yahoo.com.au>
Cc: "Martin J. Bligh" <mbligh@aracnet.com>,
linux-kernel <linux-kernel@vger.kernel.org>,
John Hawkes <hawkes@sgi.com>
Subject: Re: [PATCH] reduce inter-node balancing frequency
Date: Thu, 15 Jul 2004 21:58:17 -0400 [thread overview]
Message-ID: <200407152158.17605.jbarnes@engr.sgi.com> (raw)
In-Reply-To: <40F733D2.2000309@yahoo.com.au>
On Thursday, July 15, 2004 9:48 pm, Nick Piggin wrote:
> Yeah, these numbers actually used to be a lot higher, but someone
> at Intel (I forget who it was right now) found them to be too high
> on even a 32 way SMT system. They could probably be raised a *little*
> bit in the generic code.
Ok, but I wouldn't want to hurt the performance of small machines at all. If
possible, I'd rather just add another level to the hierarchy if MAX_NUMNODES
> some value.
> > We may have enough information to do that already... I'll look.
>
> The plan is to allow arch overridable SD_CPU/NODE_INIT macros for
> those architectures that just look like a regular SMT+SMP+NUMA, and
> have the generic code set them up.
Would simply creating a 'supernode' scheduling domain work with the existing
scheduler? My thought was that in the ia64 code we'd create them for every N
regular nodes; its children would be the regular nodes with the existing
defaults.
Thanks,
Jesse
next prev parent reply other threads:[~2004-07-16 1:58 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-07-15 22:29 [PATCH] reduce inter-node balancing frequency Jesse Barnes
2004-07-16 0:14 ` Martin J. Bligh
2004-07-16 0:38 ` Jesse Barnes
2004-07-16 1:48 ` Nick Piggin
2004-07-16 1:58 ` Jesse Barnes [this message]
2004-07-16 5:40 ` Martin J. Bligh
2004-07-16 5:53 ` Nick Piggin
2004-07-16 14:45 ` Jesse Barnes
2004-07-16 15:04 ` Chris Wedgwood
2004-07-16 15:30 ` Jesse Barnes
2004-07-17 3:00 ` Nick Piggin
2004-07-17 16:44 ` Jesse Barnes
2004-07-16 14:42 ` Jesse Barnes
2004-07-18 13:12 ` Jes Sorensen
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