diff for duplicates of <20041130162659.BA5FAEB2A9@mail.romat.com> diff --git a/a/1.txt b/N1/1.txt index 2e1350b..916e840 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,67 +1,2 @@ So, what I need to do, if I understand correctly, is to create a fixed mapping -From a virtual address to a physical address on the tlb, and use this -Virtual address to change the values of EntryLo to 0xD in order to -Access the device on the address range I mapped Chip-select 1 to? - -(Excuse my poor phrasing, I've been googling all day...) - -Any idea on how I might accomplish that from a driver? -I've found a function called add_wired_entry(...), is this -What I should be using? - -Thanks! -Gilad. - ------Original Message----- -From: Dominic Sweetman [mailto:dom@mips.com] -Sent: Tuesday, November 30, 2004 12:25 PM -To: Gilad Rom -Cc: linux-mips@linux-mips.org -Subject: Re: CP0 EntryLo - - -Gilad Rom (gilad@romat.com) writes: - -> I am attempting to access a peripheral device over the Au1500 static bus. -> -> According to the Au1500 Databook, Whenever I set the Chip Select config -> Register DTY bits to 1 (for "I/O Device"). - -> I must also set Bits 29:26 of CoProcessor 0 to 0xD, to represent -> bits 35:32 of the Physical address. - -"CoProcessor 0" is a kind of fiction represented by a whole bunch of -registers, so you've wandered a long way into the weeds here. - -> My question is, if anyone can answer it, is how do I setup -> The CoProcessor0 registers 29:26 in my driver? - -I think you are referring to the "EntryLo0-1" register pair. These -are used as staging registers when reading or writing entries in the -TLB, which is the address translation table. - -The manual is implying is that you need to set up a TLB entry to -access these high physical addresses. - -In Linux most of the TLB is maintained by the kernel as a cache of the -translations used by user programs. That's probably why you see -"random values" from the staging registers; the kernel is busy taking -exceptions when required translations aren't in the TLB and fixing -them up. - -However, the Au1500 hardware permits a small number of TLB entries to -be "wired", for fixed functions like your I/O accesses. - -I'm not enough of an expert on the Linux kernel to tell you how to set -up a wired entry: but grep through the sources and you'll turn -something up! - -> I have noticed a set of functions called write/read_c0_entrylo[0,1], -> But I keep getting random values when invoking these from my driver. - -I think those are way too low-level for your purposes. - --- -Dominic Sweetman -MIPS Technologies diff --git a/a/content_digest b/N1/content_digest index 020109c..9ff340f 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -3,75 +3,10 @@ "Subject\0RE: CP0 EntryLo\0" "Date\0Tue, 30 Nov 2004 18:26:59 +0200\0" "To\0'Dominic Sweetman' <dom@mips.com>\0" - "Cc\0<linux-mips@linux-mips.org>\0" + "Cc\0linux-mips@linux-mips.org\0" "\00:1\0" "b\0" "So, what I need to do, if I understand correctly, is to create a fixed\n" - "mapping\n" - "From a virtual address to a physical address on the tlb, and use this\n" - "Virtual address to change the values of EntryLo to 0xD in order to \n" - "Access the device on the address range I mapped Chip-select 1 to?\n" - "\n" - "(Excuse my poor phrasing, I've been googling all day...)\n" - "\n" - "Any idea on how I might accomplish that from a driver?\n" - "I've found a function called add_wired_entry(...), is this\n" - "What I should be using?\n" - "\n" - "Thanks!\n" - "Gilad.\n" - "\n" - "-----Original Message-----\n" - "From: Dominic Sweetman [mailto:dom@mips.com] \n" - "Sent: Tuesday, November 30, 2004 12:25 PM\n" - "To: Gilad Rom\n" - "Cc: linux-mips@linux-mips.org\n" - "Subject: Re: CP0 EntryLo\n" - "\n" - "\n" - "Gilad Rom (gilad@romat.com) writes:\n" - "\n" - "> I am attempting to access a peripheral device over the Au1500 static bus.\n" - "> \n" - "> According to the Au1500 Databook, Whenever I set the Chip Select config\n" - "> Register DTY bits to 1 (for \"I/O Device\").\n" - "\n" - "> I must also set Bits 29:26 of CoProcessor 0 to 0xD, to represent\n" - "> bits 35:32 of the Physical address.\n" - "\n" - "\"CoProcessor 0\" is a kind of fiction represented by a whole bunch of\n" - "registers, so you've wandered a long way into the weeds here.\n" - "\n" - "> My question is, if anyone can answer it, is how do I setup\n" - "> The CoProcessor0 registers 29:26 in my driver?\n" - "\n" - "I think you are referring to the \"EntryLo0-1\" register pair. These\n" - "are used as staging registers when reading or writing entries in the\n" - "TLB, which is the address translation table. \n" - "\n" - "The manual is implying is that you need to set up a TLB entry to\n" - "access these high physical addresses. \n" - "\n" - "In Linux most of the TLB is maintained by the kernel as a cache of the\n" - "translations used by user programs. That's probably why you see\n" - "\"random values\" from the staging registers; the kernel is busy taking\n" - "exceptions when required translations aren't in the TLB and fixing\n" - "them up.\n" - "\n" - "However, the Au1500 hardware permits a small number of TLB entries to\n" - "be \"wired\", for fixed functions like your I/O accesses.\n" - "\n" - "I'm not enough of an expert on the Linux kernel to tell you how to set\n" - "up a wired entry: but grep through the sources and you'll turn\n" - "something up!\n" - "\n" - "> I have noticed a set of functions called write/read_c0_entrylo[0,1],\n" - "> But I keep getting random values when invoking these from my driver.\n" - "\n" - "I think those are way too low-level for your purposes.\n" - "\n" - "--\n" - "Dominic Sweetman\n" - MIPS Technologies + mapping -51c2ff039d262ff8624f0434db333ac8ec5f1ba78623f19cc1a65ad5215a6796 +8c28fb006ccf7991b234aa91db26322f70232a417c0b6626da9dad820c5b51dd
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