From mboxrd@z Thu Jan 1 00:00:00 1970 From: Arjan van de Ven Subject: Re: [PATCH]: speedstep-lib: fix frequency multiplier for Pentium4 models 0&1 Date: Sat, 22 Jan 2005 15:23:53 +0100 Message-ID: <20050122142353.GB19194@devserv.devel.redhat.com> References: <41F259C4.9020903@tiscali.de> Mime-Version: 1.0 Return-path: Content-Disposition: inline In-Reply-To: <41F259C4.9020903@tiscali.de> List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: cpufreq-bounces@lists.linux.org.uk Errors-To: cpufreq-bounces+glkc-cpufreq=gmane.org@lists.linux.org.uk Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Matthias-Christian Ott Cc: Dave Jones , cpufreq@zenII.linux.org.uk, Linux Kernel Mailing List , Linus Torvalds , "H. Peter Anvin" , Zwane Mwaikambo , Dominik Brodowski On Sat, Jan 22, 2005 at 02:48:52PM +0100, Matthias-Christian Ott wrote: > The Pentium4 models 0&1 have a longer MSR_EBC_FREQUENCY_ID register as > the models 2&3, so the bit shift must be bigger. I would feel safer if this checked that it was actually a p4 as well... From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S262724AbVAVOYQ (ORCPT ); Sat, 22 Jan 2005 09:24:16 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S262725AbVAVOYQ (ORCPT ); Sat, 22 Jan 2005 09:24:16 -0500 Received: from mx1.redhat.com ([66.187.233.31]:8077 "EHLO mx1.redhat.com") by vger.kernel.org with ESMTP id S262724AbVAVOYO (ORCPT ); Sat, 22 Jan 2005 09:24:14 -0500 Date: Sat, 22 Jan 2005 15:23:53 +0100 From: Arjan van de Ven To: Matthias-Christian Ott Cc: Linux Kernel Mailing List , Dave Jones , cpufreq@zenII.linux.org.uk, "H. Peter Anvin" , Dominik Brodowski , Zwane Mwaikambo , Linus Torvalds Subject: Re: [PATCH]: speedstep-lib: fix frequency multiplier for Pentium4 models 0&1 Message-ID: <20050122142353.GB19194@devserv.devel.redhat.com> References: <41F259C4.9020903@tiscali.de> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <41F259C4.9020903@tiscali.de> User-Agent: Mutt/1.4.1i Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Jan 22, 2005 at 02:48:52PM +0100, Matthias-Christian Ott wrote: > The Pentium4 models 0&1 have a longer MSR_EBC_FREQUENCY_ID register as > the models 2&3, so the bit shift must be bigger. I would feel safer if this checked that it was actually a p4 as well...