From mboxrd@z Thu Jan  1 00:00:00 1970
From: Arun Sharma <arun.sharma@intel.com>
Subject: [PATCH][1/5] x86-64-eax.patch
Date: Tue, 19 Apr 2005 15:05:48 -0700
Message-ID: <20050419220548.GA25248@intel.com>
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To: Ian Pratt <Ian.Pratt@cl.cam.ac.uk>, Keir Fraser <Keir.Fraser@cl.cam.ac.uk>
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   vmx_vmcs.c:
     fix inline asms for x86-64
   
   Signed-Off-By: Benjamin Liu <benjamin.liu@intel.com>
   Signed-Off-By: Arun Sharma <arun.sharma@intel.com>
diff -Nru a/xen/arch/x86/vmx_vmcs.c b/xen/arch/x86/vmx_vmcs.c
--- a/xen/arch/x86/vmx_vmcs.c	2005-04-18 16:49:37 -07:00
+++ b/xen/arch/x86/vmx_vmcs.c	2005-04-18 16:49:37 -07:00
@@ -187,7 +187,7 @@
 
     vmx_setup_platform(ed, ec);
 
-    __asm__ __volatile__ ("sgdt  (%%eax) \n" :: "a"(&desc) : "memory");
+    __asm__ __volatile__ ("sgdt  (%0) \n" :: "a"(&desc) : "memory");
     host_env.gdtr_limit = desc.size;
     host_env.gdtr_base = desc.address;
 
@@ -197,7 +197,7 @@
     error |= __vmwrite(GUEST_LDTR_BASE, 0);
     error |= __vmwrite(GUEST_LDTR_LIMIT, 0);
         
-    __asm__ __volatile__ ("str  (%%eax) \n" :: "a"(&tr) : "memory");
+    __asm__ __volatile__ ("str  (%0) \n" :: "a"(&tr) : "memory");
     host_env.tr_selector = tr;
     host_env.tr_limit = sizeof(struct tss_struct);
     host_env.tr_base = (unsigned long) &init_tss[cpu];
@@ -358,7 +358,7 @@
     error |= __vmwrite(HOST_GS_BASE, host_env->ds_base);
 
 /* Debug */
-    __asm__ __volatile__ ("sidt  (%%eax) \n" :: "a"(&desc) : "memory");
+    __asm__ __volatile__ ("sidt  (%0) \n" :: "a"(&desc) : "memory");
     host_env->idtr_limit = desc.size;
     host_env->idtr_base = desc.address;
     error |= __vmwrite(HOST_IDTR_BASE, host_env->idtr_base);