From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with archive (Exim 4.43) id 1DVTnH-0007jS-CE for mharc-grub-devel@gnu.org; Tue, 10 May 2005 08:25:00 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1DVTnB-0007g2-7g for grub-devel@gnu.org; Tue, 10 May 2005 08:24:53 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1DVTn8-0007dw-4S for grub-devel@gnu.org; Tue, 10 May 2005 08:24:50 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1DVTn7-0007V0-Nl for grub-devel@gnu.org; Tue, 10 May 2005 08:24:49 -0400 Received: from [80.190.231.112] (helo=khepri.openbios.org) by monty-python.gnu.org with esmtp (TLS-1.0:DHE_RSA_3DES_EDE_CBC_SHA:24) (Exim 4.34) id 1DVTie-0005zS-QE for grub-devel@gnu.org; Tue, 10 May 2005 08:20:12 -0400 Received: from stepan by khepri.openbios.org with local (Exim 4.50) id 1DVTcS-0003eH-2b for grub-devel@gnu.org; Tue, 10 May 2005 14:13:48 +0200 Date: Tue, 10 May 2005 14:13:48 +0200 From: Stefan Reinauer To: The development of GRUB 2 Message-ID: <20050510121347.GA13949@openbios.org> References: <20050510085058.DEF762FAC4@smtp.263.net> <87y8an4emu.fsf@student.han.nl> <29f91651050510032358cc2370@mail.gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <29f91651050510032358cc2370@mail.gmail.com> X-Operating-System: Linux 2.6.11.1-20050305105929-smp on an x86_64 User-Agent: Mutt/1.5.6i X-Duff: Orig. Duff, Duff Lite, Duff Dry, Duff Dark, Raspberry Duff, Lady Duff, Red Duff, Tartar Control Duff Subject: Re: Fwd: memory probing X-BeenThere: grub-devel@gnu.org X-Mailman-Version: 2.1.5 Precedence: list Reply-To: The development of GRUB 2 List-Id: The development of GRUB 2 List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 10 May 2005 12:24:55 -0000 * alfred hitch [050510 12:23]: > anyways, how can u get this from processor also ? The processor has little to nothing to do with this.. it's dependent on the northbridge and southbridge. > I vaguely remember see'ing some code where someone on a i386 based > plattform but WITHOUT bios, used smbus protocol to talk to a device > across PIIX4 to get the info. Which might work on one motherboard and fail on another. Even if they both have a PIIX4. > I am not familiar with PC architecture, so can someone tell me if > there is some standard chip (memory controller? ?) where one can read > this on PC type arch. atleast ? No. Not in a portable way. That's why BIOS provides the e820 table. > I am on a IXDP425 plattform, and so far I cannot see any such > register on the data sheets .. They are usually not disclosed in publically available datasheets. Stefan