From: Andy Isaacson <adi@hexapodia.org>
To: "Maciej W. Rozycki" <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Subject: Re: [patch 4/5] SiByte fixes for 2.6.12
Date: Thu, 23 Jun 2005 15:27:09 -0700 [thread overview]
Message-ID: <20050623222709.GC26427@hexapodia.org> (raw)
In-Reply-To: <Pine.LNX.4.61L.0506231601270.17155@blysk.ds.pg.gda.pl>
On Thu, Jun 23, 2005 at 04:11:51PM +0100, Maciej W. Rozycki wrote:
> On Thu, 23 Jun 2005, Andy Isaacson wrote:
> > The code looks like it's structured to be able to be compiled with
> > support for multiple CPUs, say, r4k and SB1; using #error would seem to
> > prevent that.
> >
> > With the code as currently structured, you don't know it's going to be a
> > noop until runtime comes along and cpu_has_4ktlb is true...
>
> Well, I've had a look at the code and it's such a mess. Obviously
> calling ld_mmu_r4xx0() (or any of the other variants) should not be
> compiled conditionally and more specific cases, i.e. based on PRId values
> should take precedence. I'll see if I can make it better.
I certainly won't argue with a cleanup of arch/mips/mm/cache.c, that
code has annoyed me from first laying eyes on it...
-andy
next prev parent reply other threads:[~2005-06-23 22:28 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-06-22 23:00 [patch 0/5] SiByte fixes for 2.6.12 Andrew Isaacson
2005-06-22 23:00 ` [patch 1/5] " Andrew Isaacson
2005-06-23 11:01 ` Maciej W. Rozycki
2005-06-23 23:26 ` Andy Isaacson
2005-10-01 9:28 ` Ralf Baechle
2005-10-03 11:56 ` Maciej W. Rozycki
2005-10-03 12:50 ` Ralf Baechle
2005-10-03 13:15 ` Daniel Jacobowitz
2005-10-03 13:24 ` Ralf Baechle
2005-10-03 13:35 ` Maciej W. Rozycki
2005-10-01 10:15 ` Ralf Baechle
2006-01-16 15:48 ` Martin Michlmayr
2006-01-23 12:55 ` Martin Michlmayr
2005-06-22 23:01 ` [patch 2/5] " Andrew Isaacson
2005-06-22 23:01 ` [patch 3/5] " Andrew Isaacson
2005-06-23 11:07 ` Maciej W. Rozycki
2005-06-23 19:48 ` Andy Isaacson
2005-06-30 16:43 ` Maciej W. Rozycki
2005-07-18 17:19 ` Maciej W. Rozycki
2005-06-22 23:01 ` [patch 4/5] " Andrew Isaacson
2005-06-23 11:08 ` Maciej W. Rozycki
2005-06-23 14:49 ` Andy Isaacson
2005-06-23 15:11 ` Maciej W. Rozycki
2005-06-23 22:27 ` Andy Isaacson [this message]
2005-10-01 11:57 ` Ralf Baechle
2005-06-22 23:02 ` [patch 5/5] " Andrew Isaacson
2005-10-01 12:07 ` Ralf Baechle
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