From: Matt Porter <mporter@kernel.crashing.org>
To: Shawn Jin <shawnxjin@gmail.com>
Cc: ppcembed <linuxppc-embedded@ozlabs.org>
Subject: Re: writel(), readl() in <asm-ppc/io.h>
Date: Fri, 12 Aug 2005 20:33:35 -0700 [thread overview]
Message-ID: <20050812203335.K30033@cox.net> (raw)
In-Reply-To: <c3d0340b0508121811e7b6fc2@mail.gmail.com>; from shawnxjin@gmail.com on Fri, Aug 12, 2005 at 06:11:14PM -0700
On Fri, Aug 12, 2005 at 06:11:14PM -0700, Shawn Jin wrote:
> Hi,
>
> In <asm-ppc/io.h>, writew(), readw(), writel(), and readl() are
> defined to little endian access for all platforms unless either
> CONFIG_APUS or CONFIG_8260_PCI9 is defined.
>
> Why? Aren't they correct in big endian systems, are they? Maybe I miss
> something here.
I'm not sure what your qustion is but I'll take a stab at an answer. :)
read*()/write*() are accessors for PCI and PCI only. PCI is little
endian. PPC is big endian. All platforms must byte swap on access
to PCI memory space except in special cases. The two exceptions
must byte swap in hardware. Looks like it is due to errata in the
8260 PCI bridge case. APUS is probably byte swapping in hardware
because APUS is simply odd.
-Matt
next prev parent reply other threads:[~2005-08-13 3:33 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-08-13 1:11 writel(), readl() in <asm-ppc/io.h> Shawn Jin
2005-08-13 3:33 ` Matt Porter [this message]
2005-08-14 3:56 ` Shawn Jin
2005-08-14 4:25 ` Eugene Surovegin
2005-08-14 18:16 ` Shawn Jin
2005-08-14 16:14 ` Matt Porter
2005-08-14 16:36 ` Arthur Othieno
2005-08-14 18:53 ` Shawn Jin
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