From mboxrd@z Thu Jan  1 00:00:00 1970
From: Arun Sharma <arun.sharma@intel.com>
Subject: [PATCH][VT] Enable multi-word DMA mode 2 for the PIIX3
	chipset
Date: Mon, 15 Aug 2005 14:45:44 -0700
Message-ID: <20050815214544.GA17389@intel.com>
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To: Ian Pratt <Ian.Pratt@cl.cam.ac.uk>, Keir Fraser <Keir.Fraser@cl.cam.ac.uk>
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Enable multi-word DMA mode 2 for the PIIX3 chipset

Without this patch, Linux PIIX3 driver would see ultra DMA and get confused
and ended up disabling DMA.

With the patch, we're able to see 3x increase in disk read throughput.

Signed-off-by: Winston Wang <winston.l.wang@intel.com>
Signed-off-by: Arun Sharma <arun.sharma@intel.com>

diff -r 29aab159846c -r b5196e075602 tools/ioemu/hw/ide.c
--- a/tools/ioemu/hw/ide.c	Mon Aug 15 18:32:29 2005
+++ b/tools/ioemu/hw/ide.c	Mon Aug 15 20:28:07 2005
@@ -430,6 +430,7 @@
         put_le16(p + 59, 0x100 | s->mult_sectors);
     put_le16(p + 60, s->nb_sectors);
     put_le16(p + 61, s->nb_sectors >> 16);
+    put_le16(p + 63, 0x07);
     put_le16(p + 80, (1 << 1) | (1 << 2));
     put_le16(p + 82, (1 << 14));
     put_le16(p + 83, (1 << 14));
@@ -460,7 +461,7 @@
     put_le16(p + 48, 1); /* dword I/O (XXX: should not be set on CDROM) */
     put_le16(p + 49, 1 << 9); /* LBA supported, no DMA */
     put_le16(p + 53, 3); /* words 64-70, 54-58 valid */
-    put_le16(p + 63, 0x103); /* DMA modes XXX: may be incorrect */
+    put_le16(p + 63, 0x07); /* Multi-word DMA mode 2 */ 
     put_le16(p + 64, 1); /* PIO modes */
     put_le16(p + 65, 0xb4); /* minimum DMA multiword tx cycle time */
     put_le16(p + 66, 0xb4); /* recommended DMA multiword tx cycle time */