Re: [PATCH]: Re: qla1280.c broken on SGI visws, PCI coherency problem

[Jeremy Higdon <jeremy@sgi.com>]

On Tue, Dec 13, 2005 at 08:50:13AM -0600, James Bottomley wrote:
> On Tue, 2005-12-13 at 07:22 -0600, Michael Reed wrote:
> > I believe the biggest issue with VISWS is that it appears to need
> > mmiowb() and we likely don't know how to implement it.  Hence, for
> > that platform, it would make sense to replace the mmiowb() with a
> > posting read.
> 
> Well, there's an easy way to tell ... the reason for the mmiowb in the
> qla1280 driver is supposed to be an SMP race, according to the
> description, so if it fails on UP as well there's something else going
> on here ...

The 320 was available with two CPUs, and though the post doesn't say
what this particular one had, it likely had two.  The original post
also indicated a problem with a two-cpu motherboard, though I don't
think that was the 320 (VisWS).

> I'm still suspicious because the mmiowb() in this driver replaced a
> posted write flush instruction, which altered the behaviour of the
> driver.  The qla1280 is just rare enough that it might have taken this
> long to notice ...

The 12160 is in most Altix machines and behaves just like a 1280.
If there were a problem with it in this context, we'd know about it.

I'm still betting on the old problem (time moves downward):

	cpu A	lock
		posted pio write X
		unlock
	cpu B	lock
		posted pio write Y
		unlock
	PCI bus retire pio write Y
		retire pio write X

The Qlogic architecture doesn't like this.

jeremy