From: thockin@hockin.org
To: Prakash Punnoor <prakash@punnoor.de>
Cc: linux-kernel@vger.kernel.org
Subject: Re: AMD64, 4GB, mttr questions
Date: Tue, 24 Jan 2006 19:17:38 -0800 [thread overview]
Message-ID: <20060125031738.GA8656@hockin.org> (raw)
In-Reply-To: <200601241433.50625.prakash@punnoor.de>
On Tue, Jan 24, 2006 at 02:33:46PM +0100, Prakash Punnoor wrote:
> I have a machine with 4GB RAM, an Athlon64 X2 and following mttr entries:
>
> reg00: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1
> reg01: base=0x100000000 (4096MB), size=2048MB: write-back, count=1
> reg02: base=0x80000000 (2048MB), size=2048MB: uncachable, count=1
>
> First of all, why is there an uncachable region? Is it the upper half of
> memory? Or is this just a hole and the remaining 2GB are seated at
> 0x100000000 ?
That's the IO hole between 2 and 4 GB. Your setup looks fine to me. It's
perfectly valid to have an uncacheable region overlap a write-back region.
next prev parent reply other threads:[~2006-01-25 3:14 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-01-24 13:33 AMD64, 4GB, mttr questions Prakash Punnoor
2006-01-25 3:17 ` thockin [this message]
[not found] <5ywpz-49F-11@gated-at.bofh.it>
2006-01-25 0:13 ` Robert Hancock
2006-01-26 7:37 ` Prakash Punnoor
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