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From: Stuart Brady <sdbrady@ntlworld.com>
To: Joel Soete <soete.joel@tiscali.be>
Cc: rmk+lkml <rmk+lkml@arm.linux.org.uk>,
	parisc-linux <parisc-linux@parisc-linux.org>
Subject: [parisc-linux] Conditional Execution and Instruction Nullification
Date: Sun, 29 Jan 2006 03:14:52 +0000	[thread overview]
Message-ID: <20060129031452.GA24516@miranda.arrow> (raw)
In-Reply-To: <43DBA5A1.90002@tiscali.be>

On Sat, Jan 28, 2006 at 05:10:57PM +0000, Joel Soete wrote:
> Ah ok sorry, I was confused by a colleague of mine experimented in other 
> cpu risc who tell me that 'instrucion nullification' was typicaly RISC, 
> though. (I can just try to ask him more details on cpu arch he spoke about)

Ignoring conditional traps/branches (and hoping I've got this right):

Neither Alpha nor PowerPC have conditional execution.  MIPS and SPARC
have conditional move instructions (as does POWER).  ARM has conditional
execution for most instructions.  PA-RISC has instruction nullification.

SPARC does have delay slot nullification (with confusing semantics), but
that's unrelated.  MIPS (since MIPS II) and PA-RISC have this, too.

http://gec.di.uminho.pt/discip/TextoAC/AnexoE.html might be a good read.

Cheers,
-- 
Stuart Brady
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           reply	other threads:[~2006-01-29  3:14 UTC|newest]

Thread overview: expand[flat|nested]  mbox.gz  Atom feed
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