Re: [PATCH RFC 2/3] x86-64: Calgary IOMMU - Calgary specific bits

[Jon Mason <jdmason@us.ibm.com>]

On Tue, Mar 14, 2006 at 06:56:32PM -0600, Olof Johansson wrote:
> On Tue, Mar 14, 2006 at 06:55:15PM -0600, Jon Mason wrote:
> > On Wed, Mar 15, 2006 at 12:03:06AM +0100, Pavel Machek wrote:
> > > Hi!
> > > 
> > > > +union tce_entry {
> > > > +   	u64 te_word;
> > > > +	struct {
> > > > +		unsigned int  read     :1;   /* read allowed */
> > > > +		unsigned int  write    :1;   /* write allowed */
> > > > +		unsigned int  hubid    :6;   /* hub id - unused */
> > > > +		unsigned int  rsvd     :4;   /* reserved */
> > > > +		unsigned long rpn      :36;  /* Real page number */
> > > > +		unsigned int  unused   :16;  /* unused */
> > > > +	} bits;
> > > > +};
> > > 
> > > I'd say this is going to be pretty flakey.
> > 
> > Why do you think this would be flakey?  It's nearly identical to the
> > tce_entry definition in include/asm-powerpc/tce.h (endien swapped, of
> > course).
> 
> We're killing structures like that one by one on PPC, I just haven't
> gotten around to dealing with tce_entry yet.
> 
> The way to do it is to use masking and shifting by hand.

Really?  I thought this was much more elegant than masking and
bitshifting (and less prone to errors).  Is there a particular reason to
do it that way?

Thanks,
Jon